index
:
freebsd/ports.git
2014Q1
2014Q2
2014Q3
2014Q4
2015Q1
2015Q2
2015Q3
2015Q4
2016Q1
2016Q2
2016Q3
2016Q4
2017Q1
2017Q2
2017Q3
2017Q4
2018Q1
2018Q2
2018Q3
2018Q4
2019Q1
2019Q2
2019Q3
2019Q4
2020Q1
2020Q2
2020Q3
2020Q4
2021Q1
2021Q2
2021Q3
2021Q4
2022Q1
2022Q2
2022Q3
2022Q4
2023Q1
2023Q2
2023Q3
2023Q4
2024Q1
2024Q2
2024Q3
2024Q4
main
Unnamed repository; edit this file 'description' to name the repository.
git
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
cad
(
follow
)
Commit message (
Expand
)
Author
Age
Files
Lines
*
multimedia/libvpx: update 1.13.0
Jan Beich
2023-02-11
1
-0
/
+1
*
cad/openvsp: drop unused libpthread-stubs
Jan Beich
2023-02-11
1
-2
/
+1
*
cad/yosys: Update 0.25 → 0.26
Yuri Victorovich
2023-02-10
2
-5
/
+5
*
cad/veryl: Update 0.3.2 → 0.3.4
Yuri Victorovich
2023-02-10
2
-16
/
+16
*
cad/k40-whisperer: Replace reference to PY_PILLOW with its value
Yasuhiro Kimura
2023-02-10
1
-1
/
+1
*
*/*: Update fuz@fuz.su to fuz@FreeBSD.org
Robert Clausecker
2023-02-09
2
-2
/
+2
*
cad/veryl: Update 0.3.1 → 0.3.2
Yuri Victorovich
2023-02-07
2
-37
/
+37
*
cad/py-cocotb: Add test dependency
Yuri Victorovich
2023-02-05
1
-1
/
+2
*
cad/py-cocotb: Add test dependency
Yuri Victorovich
2023-02-05
1
-1
/
+2
*
Revert "Mk/Uses/python.mk: Fix USE_PYTHON=pep517: always compile and install ...
Charlie Li
2023-02-05
1
-1
/
+0
*
Mk/Uses/python.mk: Fix USE_PYTHON=pep517: always compile and install bytecode
Po-Chuan Hsieh
2023-02-06
1
-0
/
+1
*
cad/py-cocotb: Fix the test target
Yuri Victorovich
2023-02-05
1
-4
/
+12
*
cad/py-cocotb: New port: Coroutine based cosimulation library for writing VHD...
Yuri Victorovich
2023-02-03
4
-0
/
+49
*
cad/brlcad: update to version 7.32.6
Pedro F. Giffuni
2023-02-01
3
-108
/
+10
*
cad/veryl: Update 0.3.0 → 0.3.1
Yuri Victorovich
2023-01-31
2
-55
/
+58
*
cad/veryl: Update 0.2.2 → 0.3.0
Yuri Victorovich
2023-01-29
2
-31
/
+43
*
cad/veryl: Update 0.2.1 → 0.2.2
Yuri Victorovich
2023-01-25
2
-52
/
+394
*
cad/kicad: update KiCad and libraries to 6.0.11
Christoph Moench-Tegeder
2023-01-25
13
-24
/
+26
*
cad/nvc: Update 1.7.1 → 1.8.1
Yuri Victorovich
2023-01-23
3
-5
/
+50
*
cad/verilator: Update 5.004 → 5.006
Yuri Victorovich
2023-01-23
3
-6
/
+15
*
cad/freecad: fix build after ebbef4b5f8
Christoph Moench-Tegeder
2023-01-21
4
-0
/
+41
*
cad/veryl: Update 0.2.0 -> 0.2.1
Yuri Victorovich
2023-01-19
2
-10
/
+13
*
math/suitesparse*: bump PORTREVISION of dependant ports
Thierry Thomas
2023-01-19
1
-1
/
+1
*
graphics/proj: Update to 9.1.1
Loïc Bartoletti
2023-01-18
1
-1
/
+1
*
cad/veryl: Update 0.1.13 -> 0.2.0
Yuri Victorovich
2023-01-17
2
-79
/
+364
*
cad/antimony: New port: CAD from a parallel universe
Yuri Victorovich
2023-01-16
7
-0
/
+160
*
*/*: bump libboost*.so libraries consumert after Boost upgrade
Dima Panov
2023-01-16
3
-2
/
+3
*
Mk/**ruby.mk: Switch from USE_RUBY=yes to USES=ruby
Muhammad Moinur Rahman
2023-01-14
2
-3
/
+1
*
cad/klayout: Update to 0.28.3
Hiroki Sato
2023-01-14
3
-150
/
+151
*
cad/veryl: Update 0.1.8 -> 0.1.13
Yuri Victorovich
2023-01-11
2
-7
/
+7
*
cad/netgen: Update to 6.2.2031
Stephen Montgomery-Smith
2023-01-11
3
-5
/
+4
*
*/*: rename CHEESESHOP to PYPI in MASTER_SITES
Dmitry Marakasov
2023-01-11
6
-6
/
+6
*
cad/veryl: Update 0.1.3 -> 0.1.8
Yuri Victorovich
2023-01-09
2
-35
/
+40
*
cad/ngspice_rework: fix packaging
Christoph Moench-Tegeder
2023-01-09
1
-1
/
+1
*
cad/kicad-library-*-devel: Update to the latest commits
Michael Reifenberger
2023-01-08
12
-47
/
+907
*
cad/kicad-devel: Update to the latest commit
Michael Reifenberger
2023-01-08
7
-21
/
+64
*
cad/ngspice_rework: Update to 38
Kevin Zheng
2023-01-08
2
-4
/
+4
*
cad/silice: New port: Language that simplifies prototyping and writing algori...
Yuri Victorovich
2023-01-08
5
-0
/
+160
*
cad/py-edalize: New port: Library for interfacing EDA tools
Yuri Victorovich
2023-01-08
4
-0
/
+43
*
cad/py-vunit-hdl: New pert: Open source unit testing framework for VHDL/Syste...
Yuri Victorovich
2023-01-08
4
-0
/
+30
*
*/*: Bump rust (cargo) ports to reflect on WITH_LTO
Daniel Engberg
2023-01-07
3
-0
/
+3
*
cad/qelectrotech: Update to 0.9.0
Gleb Popov
2023-01-07
3
-2214
/
+5554
*
cad/veryl: New port: Veryl: A modern Hardware Description Language (HDL)
Yuri Victorovich
2023-01-05
4
-0
/
+629
*
cad/svls: New port: SystemVerilog language server
Yuri Victorovich
2023-01-05
4
-0
/
+437
*
cad/yosys: Update 0.24 -> 0.25
Yuri Victorovich
2023-01-04
3
-4
/
+31
*
cad/svlint: New port: SystemVerilog linter
Yuri Victorovich
2023-01-02
4
-0
/
+287
*
cad/klayout: Update to 0.28.2
Hiroki Sato
2023-01-03
33
-299
/
+369
*
cad/freecad: fix desktop integration
Max Brazhnikov
2023-01-02
2
-16
/
+27
*
cad/basicdsp: Cleanup EXPIRED ports
Muhammad Moinur Rahman
2022-12-31
6
-61
/
+0
*
cleanup: Remove expired ports:
Rene Ladan
2022-12-31
7
-789
/
+0
[next]