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Commit message (
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Author
Age
Files
Lines
*
cad/surelog: Add PORTSCOUT line
Yuri Victorovich
2023-03-11
1
-0
/
+2
*
cad/netgen-lvs: Update 1.5.249 → 1.5.250
Yuri Victorovich
2023-03-11
2
-4
/
+4
*
graphics/proj: Update to 9.2.0
Loïc Bartoletti
2023-03-09
1
-1
/
+1
*
PyQt: Update to latest versions
Loïc Bartoletti
2023-03-09
4
-3
/
+4
*
cad/netgen-lvs: Update 1.5.237 → 1.5.249
Yuri Victorovich
2023-03-09
2
-4
/
+4
*
cad/surelog: Update 1.45 → 1.48
Yuri Victorovich
2023-03-08
3
-23
/
+30
*
cad/ghdl: Update 2.0.0-20230222 → 3.0.0
Yuri Victorovich
2023-03-08
3
-6
/
+5
*
cad/netgen: Update to 6.2.2302.
Stephen Montgomery-Smith
2023-03-08
2
-4
/
+4
*
cad/yosys: Update 0.26 → 0.27
Yuri Victorovich
2023-03-06
3
-4
/
+5
*
cad/svls: Update 0.2.6 → 0.2.7
Yuri Victorovich
2023-03-06
2
-35
/
+34
*
cad/verilator: Update 5.006 → 5.008
Yuri Victorovich
2023-03-05
2
-5
/
+6
*
cad/sweethome3d: update Sweet Home 3D to version 7.1
Alexey Dokuchaev
2023-03-06
2
-4
/
+4
*
cad/veryl: Update 0.5.2 → 0.5.5
Yuri Victorovich
2023-03-05
2
-250
/
+247
*
cad/veroroute: Update 2.28 → 2.29
Yuri Victorovich
2023-03-05
3
-4
/
+5
*
cad/openvsp: update to 3.32.1
Fernando Apesteguía
2023-03-05
2
-4
/
+4
*
*: Bump PORTREVISION of math/Imath users
Matthias Andree
2023-03-04
1
-1
/
+1
*
devel/onetbb: Update to 2021.8.0
Ganael LAPLANCHE
2023-03-03
1
-1
/
+1
*
cad/gdscpp: New port: C++ library to create and read GDSII file
Yuri Victorovich
2023-03-02
5
-0
/
+68
*
cad/veryl: Update 0.5.0 → 0.5.2
Yuri Victorovich
2023-03-01
2
-28
/
+34
*
accessibility/at-spi2-core: update to 2.46.0
Tobias C. Berner
2023-03-02
18
-12
/
+18
*
cad/zcad: mark qt5 flavor BROKEN
Antoine Brodin
2023-02-25
1
-0
/
+2
*
cad/geda: unbreak the port's build (specifically, linking)
Alexey Dokuchaev
2023-02-24
7
-8
/
+68
*
cad/ghdl: Correct DISTVERSION
Yuri Victorovich
2023-02-23
2
-4
/
+4
*
cad/ghdl: Re-add port: GNU VHDL simulator
Yuri Victorovich
2023-02-23
10
-0
/
+347
*
cad/geda: make the port's code consumable by contemporary compilers
Alexey Dokuchaev
2023-02-23
4
-0
/
+85
*
cad/py-vunit-hdl: Update 4.6.0 → 4.6.2
Yuri Victorovich
2023-02-22
3
-6
/
+18
*
cad/veryl: Update 0.3.4 → 0.5.0
Yuri Victorovich
2023-02-22
2
-297
/
+350
*
cad/verilator: Improve how python executable path is passed to the build
Yuri Victorovich
2023-02-21
1
-3
/
+2
*
cad/kicad: fix clang options on 32bit platforms
Christoph Moench-Tegeder
2023-02-21
1
-0
/
+40
*
cad/verilator: Fix wrong PYTHON3 path in installed makefile
Yuri Victorovich
2023-02-21
1
-2
/
+5
*
cad/py-ocp: deprecate
Antoine Brodin
2023-02-20
1
-0
/
+2
*
cad/NASTRAN-95: deprecate
Antoine Brodin
2023-02-20
1
-0
/
+2
*
cad/geda: deprecate
Antoine Brodin
2023-02-20
1
-0
/
+2
*
cad/gtkwave: Adopt/Update to 3.3.114
Nuno Teixeira
2023-02-20
2
-16
/
+17
*
cad/hs-verismith: Add PORTSCOUT tag
Yuri Victorovich
2023-02-18
1
-0
/
+2
*
cad/hs-verismith: New port: Verilog fuzzer
Yuri Victorovich
2023-02-17
4
-0
/
+370
*
lang/rust: Bump revisions after 1.67.1
Mikael Urankar
2023-02-13
3
-2
/
+3
*
cad/kicad: update KiCad and libraries to 7.0.0
Christoph Moench-Tegeder
2023-02-12
21
-422
/
+1100
*
multimedia/libvpx: update 1.13.0
Jan Beich
2023-02-11
1
-0
/
+1
*
cad/openvsp: drop unused libpthread-stubs
Jan Beich
2023-02-11
1
-2
/
+1
*
cad/yosys: Update 0.25 → 0.26
Yuri Victorovich
2023-02-10
2
-5
/
+5
*
cad/veryl: Update 0.3.2 → 0.3.4
Yuri Victorovich
2023-02-10
2
-16
/
+16
*
cad/k40-whisperer: Replace reference to PY_PILLOW with its value
Yasuhiro Kimura
2023-02-10
1
-1
/
+1
*
*/*: Update fuz@fuz.su to fuz@FreeBSD.org
Robert Clausecker
2023-02-09
2
-2
/
+2
*
cad/veryl: Update 0.3.1 → 0.3.2
Yuri Victorovich
2023-02-07
2
-37
/
+37
*
cad/py-cocotb: Add test dependency
Yuri Victorovich
2023-02-05
1
-1
/
+2
*
cad/py-cocotb: Add test dependency
Yuri Victorovich
2023-02-05
1
-1
/
+2
*
Revert "Mk/Uses/python.mk: Fix USE_PYTHON=pep517: always compile and install ...
Charlie Li
2023-02-05
1
-1
/
+0
*
Mk/Uses/python.mk: Fix USE_PYTHON=pep517: always compile and install bytecode
Po-Chuan Hsieh
2023-02-06
1
-0
/
+1
*
cad/py-cocotb: Fix the test target
Yuri Victorovich
2023-02-05
1
-4
/
+12
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