| Commit message (Expand) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Remove WWW entries moved into port Makefiles | Stefan Eßer | 2022-09-07 | 1 | -2/+0 |
| * | Add WWW entries to port Makefiles | Stefan Eßer | 2022-09-07 | 1 | -0/+1 |
| * | cad/xyce: Correct license; Add/update comments | Yuri Victorovich | 2022-07-10 | 1 | -5/+4 |
| * | cad/xyce: Remove unnecessary test dependency; Add comment | Yuri Victorovich | 2022-07-10 | 1 | -1/+1 |
| * | cad/xyce: Change to GNU tools build; Add missing test dependencies | Yuri Victorovich | 2022-07-10 | 2 | -12/+40 |
| * | cad/xyce: Chenge MASTER_SITES to GitHub URL; Add test target | Yuri Victorovich | 2022-07-10 | 2 | -6/+33 |
| * | cad/xyce: New port: Xyce electronic simulator | Yuri Victorovich | 2022-07-08 | 4 | -0/+130 |
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index : freebsd/ports.git | |
| Unnamed repository; edit this file 'description' to name the repository. | git |
| summaryrefslogtreecommitdiff |