diff options
Diffstat (limited to 'lang')
| -rw-r--r-- | lang/dotnet-host/Makefile | 2 | ||||
| -rw-r--r-- | lang/dotnet-host/distinfo | 6 | ||||
| -rw-r--r-- | lang/dotnet/Makefile | 10 | ||||
| -rw-r--r-- | lang/dotnet/distinfo | 10 | ||||
| -rw-r--r-- | lang/dotnet/pkg-plist | 2 | ||||
| -rw-r--r-- | lang/ecl/Makefile | 2 | ||||
| -rw-r--r-- | lang/ecl/distinfo | 6 | ||||
| -rw-r--r-- | lang/ecl/pkg-plist | 4 | ||||
| -rw-r--r-- | lang/gnat12/Makefile | 3 | ||||
| -rw-r--r-- | lang/silq/Makefile | 9 | ||||
| -rw-r--r-- | lang/silq/distinfo | 14 | ||||
| -rw-r--r-- | lang/silq/pkg-plist | 647 |
12 files changed, 667 insertions, 48 deletions
diff --git a/lang/dotnet-host/Makefile b/lang/dotnet-host/Makefile index 4a18ce685ec3..6df1cceccc79 100644 --- a/lang/dotnet-host/Makefile +++ b/lang/dotnet-host/Makefile @@ -1,6 +1,6 @@ PORTNAME= dotnet-host DISTVERSIONPREFIX= v -DISTVERSION= 9.0.5 +DISTVERSION= 9.0.6 CATEGORIES= lang devel MAINTAINER= arrowd@FreeBSD.org diff --git a/lang/dotnet-host/distinfo b/lang/dotnet-host/distinfo index ee3a5a022322..206e85efc531 100644 --- a/lang/dotnet-host/distinfo +++ b/lang/dotnet-host/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1747656165 -SHA256 (dotnet-runtime-v9.0.5_GH0.tar.gz) = f9626a3a72937872d942f3649b5629692cd2a8d757f0aca9da28647191f02e44 -SIZE (dotnet-runtime-v9.0.5_GH0.tar.gz) = 89301899 +TIMESTAMP = 1750752423 +SHA256 (dotnet-runtime-v9.0.6_GH0.tar.gz) = 59ace57f7171c0f7ddc745daeed008b555ccc41322fb12d6bc52e2c2696521f2 +SIZE (dotnet-runtime-v9.0.6_GH0.tar.gz) = 89537525 diff --git a/lang/dotnet/Makefile b/lang/dotnet/Makefile index d29854e1e00f..91d2600c520c 100644 --- a/lang/dotnet/Makefile +++ b/lang/dotnet/Makefile @@ -1,6 +1,6 @@ PORTNAME= dotnet DISTVERSIONPREFIX= v -DISTVERSION= ${DOTNETVERSION}.5 +DISTVERSION= ${DOTNETVERSION}.6 CATEGORIES= lang devel MASTER_SITES= https://github.com/dotnet/dotnet/releases/download/${DISTVERSIONPREFIX}${DISTVERSION}/release.json?dummy=/:dotnetmanifest \ https://github.com/sec/dotnet-core-freebsd-source-build/releases/download/${BOOTSTRAP_SDKVERSION}-vmr/:bootstrap @@ -48,10 +48,10 @@ BOOTSTRAP_SOURCEBUILT_ARTIFACTS_DISTNAME= Private.SourceBuilt.Artifacts.${BOOTST BOOTSTRAP_SDK_DISTNAME= dotnet-sdk-${BOOTSTRAP_SDKVERSION}-${BOOTSTRAP_SDK_RID} DOTNETVERSION= 9.0 -SDKVERSION= ${DOTNETVERSION}.106 -SDKVERSIONSUFFIX= -servicing.25229.4 -SDKSERVICESUFFIX= -servicing.25230.1 -LIBPACKSUFFIX= -servicing.25215.9 +SDKVERSION= ${DOTNETVERSION}.107 +SDKVERSIONSUFFIX= -servicing.25267.1 +SDKSERVICESUFFIX= -servicing.25270.1 +LIBPACKSUFFIX= -servicing.25266.13 MANIFESTSUFFIX= ${DOTNETVERSION}.100 SDK_DISTNAME= dotnet-sdk-${SDKVERSION}-${SDK_RID} SDK_RID= freebsd.${_OSVERSION_MAJOR}-${DOTNET_ARCH} diff --git a/lang/dotnet/distinfo b/lang/dotnet/distinfo index 07bd74f15198..23936fe07efe 100644 --- a/lang/dotnet/distinfo +++ b/lang/dotnet/distinfo @@ -1,8 +1,8 @@ -TIMESTAMP = 1747640495 -SHA256 (dotnet/release.json-9.0.5) = 36900c37e54d780ade35f2eaeaa9bf2dc1e7789b5d82c6c11a63d0da2853f813 -SIZE (dotnet/release.json-9.0.5) = 273 -SHA256 (dotnet/dotnet-dotnet-v9.0.5_GH0.tar.gz) = 0ff026271b8e21db503284b5cfae8e0546f009d18581497ba754084729dc74c3 -SIZE (dotnet/dotnet-dotnet-v9.0.5_GH0.tar.gz) = 494774541 +TIMESTAMP = 1750752105 +SHA256 (dotnet/release.json-9.0.6) = b68de7f6e266c57d3698a0bd7310a6c7a302d9f6ca2c477e81d8282050067c4b +SIZE (dotnet/release.json-9.0.6) = 273 +SHA256 (dotnet/dotnet-dotnet-v9.0.6_GH0.tar.gz) = 8f25d48e7ec0a94b30b702c190ee78609a348520eebef32c1e6bfa196f29d794 +SIZE (dotnet/dotnet-dotnet-v9.0.6_GH0.tar.gz) = 495316174 SHA256 (dotnet/Private.SourceBuilt.Artifacts.9.0.103-servicing.25071.1.freebsd-arm64.tar.gz) = 8dd55906bd75de83cad9c6b257cbe772cf23413c3a2caee913cde7398c1a0622 SIZE (dotnet/Private.SourceBuilt.Artifacts.9.0.103-servicing.25071.1.freebsd-arm64.tar.gz) = 827383751 SHA256 (dotnet/dotnet-sdk-9.0.103-freebsd-arm64.tar.gz) = 04027a151f981dc948f3f93fca0c8a88c3de9c18d709f61c91105af8abeb3196 diff --git a/lang/dotnet/pkg-plist b/lang/dotnet/pkg-plist index d4eee77a450d..0d650e2b1dbe 100644 --- a/lang/dotnet/pkg-plist +++ b/lang/dotnet/pkg-plist @@ -4572,6 +4572,6 @@ %%DATADIR%%/shared/Microsoft.NETCore.App/%%FULL_DOTNETVERSION%%/netstandard.dll %%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.common.itemtemplates.%%SDKVERSION%%.nupkg %%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.common.projecttemplates.%%DOTNETVERSION%%.%%SDKVERSION%%.nupkg -%%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.test.projecttemplates.%%DOTNETVERSION%%.1.1.0-rtm.25168.1.nupkg +%%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.test.projecttemplates.%%DOTNETVERSION%%.1.1.0-rtm.25262.1.nupkg %%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.web.itemtemplates.%%DOTNETVERSION%%.%%FULL_DOTNETVERSION%%.nupkg %%DATADIR%%/templates/%%FULL_DOTNETVERSION%%/microsoft.dotnet.web.projecttemplates.%%DOTNETVERSION%%.%%FULL_DOTNETVERSION%%.nupkg diff --git a/lang/ecl/Makefile b/lang/ecl/Makefile index d3fafcc2d2ca..d3fb0ca3a0e4 100644 --- a/lang/ecl/Makefile +++ b/lang/ecl/Makefile @@ -1,5 +1,5 @@ PORTNAME= ecl -PORTVERSION= 23.9.9 +PORTVERSION= 24.5.10 CATEGORIES= lang lisp MASTER_SITES= https://common-lisp.net/project/ecl/static/files/release/ diff --git a/lang/ecl/distinfo b/lang/ecl/distinfo index 7079d0bf20d4..4965ae19d8a3 100644 --- a/lang/ecl/distinfo +++ b/lang/ecl/distinfo @@ -1,3 +1,3 @@ -TIMESTAMP = 1708066364 -SHA256 (ecl-23.9.9.tgz) = c51bdab4ca6c1173dd3fe9cfe9727bcefb97bb0a3d6434b627ca6bdaeb33f880 -SIZE (ecl-23.9.9.tgz) = 8129105 +TIMESTAMP = 1750763500 +SHA256 (ecl-24.5.10.tgz) = e4ea65bb1861e0e495386bfa8bc673bd014e96d3cf9d91e9038f91435cbe622b +SIZE (ecl-24.5.10.tgz) = 8130112 diff --git a/lang/ecl/pkg-plist b/lang/ecl/pkg-plist index 4005060adbb0..244ada10f4c0 100644 --- a/lang/ecl/pkg-plist +++ b/lang/ecl/pkg-plist @@ -225,8 +225,8 @@ lib/ecl-%%VERSION%%/serve-event.fas %%SOCKETS%%lib/ecl-%%VERSION%%/sockets.fas lib/libecl.so lib/libecl.so.%%VERSION%% -lib/libecl.so.23 -lib/libecl.so.23.9 +lib/libecl.so.24 +lib/libecl.so.24.5 share/man/man1/ecl-config.1.gz share/man/man1/ecl.1.gz @dir include/ecl/gc diff --git a/lang/gnat12/Makefile b/lang/gnat12/Makefile index 35175ded2f43..63e6fbb1acb7 100644 --- a/lang/gnat12/Makefile +++ b/lang/gnat12/Makefile @@ -1,5 +1,6 @@ PORTNAME= gnat12 DISTVERSION= 12.3.0 +PORTREVISION= 1 CATEGORIES= lang MASTER_SITES= http://gcc.gnu.org/pub/gcc/releases/gcc-${DISTVERSION}/:gcc \ LOCAL/thierry:gnat @@ -141,7 +142,7 @@ PLIST_SUB+= AMD64="@comment " \ X86=" " \ 64BIT="@comment " .elif ${ARCH} == aarch64 -EXTRACT_CMD= ${SETENV} LC_ALL=en_US.UTF-8 /usr/bin/bsdtar +EXTRACT_CMD= ${SETENV} LC_ALL=en_US.UTF-8 /usr/bin/bsdtar PLIST_SUB+= X86="@comment " \ AMD64="@comment " \ AARCH64=" " \ diff --git a/lang/silq/Makefile b/lang/silq/Makefile index 8e53a2d4f284..7ef75b66ca8f 100644 --- a/lang/silq/Makefile +++ b/lang/silq/Makefile @@ -1,6 +1,5 @@ PORTNAME= silq -PORTVERSION= 20230412 -PORTREVISION= 1 +PORTVERSION= 20250624 CATEGORIES= lang math science DIST_SUBDIR= silq @@ -18,9 +17,9 @@ BUILD_DEPENDS= ldmd2:lang/ldc USE_GITHUB= yes -GH_TUPLE= eth-sri:silq:e9750cb \ - tgehr:ast:072796e:ast/ast \ - tgehr:util:a4532a4:util/util +GH_TUPLE= eth-sri:silq:92a6f80 \ + tgehr:ast:3b355c8:ast/ast \ + tgehr:util:68629c1:util/util OPTIONS_DEFINE= EXAMPLES diff --git a/lang/silq/distinfo b/lang/silq/distinfo index 1e64b52c4f42..c40137dd7ef0 100644 --- a/lang/silq/distinfo +++ b/lang/silq/distinfo @@ -1,7 +1,7 @@ -TIMESTAMP = 1681284932 -SHA256 (silq/eth-sri-silq-20230412-e9750cb_GH0.tar.gz) = f6e201f4fb1e639f7d8df9e018dbf79bda6e8a55f431801385abf6070f37e01e -SIZE (silq/eth-sri-silq-20230412-e9750cb_GH0.tar.gz) = 187476 -SHA256 (silq/tgehr-ast-072796e_GH0.tar.gz) = ea5a472d6b2f7defbce624879abc9d5d87f3b3fb3ce5634172567e29b132567a -SIZE (silq/tgehr-ast-072796e_GH0.tar.gz) = 87630 -SHA256 (silq/tgehr-util-a4532a4_GH0.tar.gz) = 667a992d464e88a1aec85efc5718bf309786b62f2e120d02f3f5f20088e1d1ad -SIZE (silq/tgehr-util-a4532a4_GH0.tar.gz) = 9975 +TIMESTAMP = 1750781400 +SHA256 (silq/eth-sri-silq-20230412-92a6f80_GH0.tar.gz) = 4b3f2e5a64e7532c3ea40ab80a49a2a50445fb88c6dee6f0d43d644f65b59589 +SIZE (silq/eth-sri-silq-20230412-92a6f80_GH0.tar.gz) = 269058 +SHA256 (silq/tgehr-ast-3b355c8_GH0.tar.gz) = deb523b088bbae1c2eca89eb4639a9d7495a4a41adf17bba0f95fb387af21617 +SIZE (silq/tgehr-ast-3b355c8_GH0.tar.gz) = 139544 +SHA256 (silq/tgehr-util-68629c1_GH0.tar.gz) = 225ed34a98c3fc9ca747c5d99bc97fc6a63f4149d7edd69737acebb597132326 +SIZE (silq/tgehr-util-68629c1_GH0.tar.gz) = 13323 diff --git a/lang/silq/pkg-plist b/lang/silq/pkg-plist index f90cc49cdebd..25ce1a530aa0 100644 --- a/lang/silq/pkg-plist +++ b/lang/silq/pkg-plist @@ -1,4 +1,11 @@ bin/silq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/abort1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/abort2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/adjustConstLookups1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/adjustConstLookups2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/adjustConstLookups3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/adjustConstLookups4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/adjustConstLookups5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/argMatchSubtyping1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/argMatchSubtyping2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayAddAssign.slq @@ -6,38 +13,131 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayConsumeIndexReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayElements.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayEntryDup.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arrayIndexConcatAssign.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/arraySlice1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/asciiUnit.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/asciiZ.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/asinQ2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assertExp.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assertTypeError.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignAfterReturn1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignAfterReturn2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignExp7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignFromArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignFromQuantum.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQcontrol.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/assignQuantumArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/attributeTrace.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badBoolUpdateAssign.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badCallLhs.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badCoerce.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badControlUncomp.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badForget.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badForget2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badIndexReplacement.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badIndexReplacement2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badLhs6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badMeasurement1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badMeasurement2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badOpAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badProdType.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badQuantumIndex1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badReverse.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badSliceReplacement.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badSliceReplacement2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/badTypes.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/badVectorSyntax.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bell.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVazirani2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bernsteinVaziraniLoopLowered.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/binaryOperators1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/binaryOperators2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/binaryOperators3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/binaryOperators4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bitwise1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bitwise2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolIDiv.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolLiteral1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolLiteral2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolNSub.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolNSubError.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/boolVectorLength.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomArithmetic.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomIndexSlice.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomPower.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomType.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomType2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomType3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/bottomType3_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/bug.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/builtInToPrelude.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/callDoubleSquare1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssign1_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssign2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssign3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssignLoop1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssignLoop2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureClassicalOpAssignLoop3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureConst.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureConsumes.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureFromType1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureFromType2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureInLoop.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureInNestedLoop.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement6_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement6_3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement7_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacement8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical6_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical6_3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical7_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureIndexReplacementClassical8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureOpAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureOpAssign1_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureOpAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureOpAssignLoop1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureOpAssignLoop2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureReplacementClassical1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureReplacementClassical1_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureShadow.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureTwice.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/captureWithAnnotation.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/cat.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalArrayAliasing.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalForget1.slq @@ -50,7 +150,10 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalHadamard.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQfree2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQnumeric.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQuantumIf.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/classicalQuantumSuperposition.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closeOverDepType.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closure.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureArrayTest.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest.slq @@ -61,6 +164,7 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/closureTest9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/cnot2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/stats/top10submissions/winter19/A1/1.slq @@ -78,6 +182,7 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/a4_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/contest/b3.slq @@ -99,6 +204,19 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/g.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/h.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer18/warmup/i.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/a7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/b1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/b2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/c1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/c2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/e1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/contest/e2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/codeforces/summer20/warmup/a3.slq @@ -139,17 +257,43 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceIntToVecLengthMismatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceNegativeNatural.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceReal.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceTupleArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceTupleArrayLengthMismatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceTupleLengthMismatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceVecToIntLengthMismatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceVector.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/coerceVectorLengthMismatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/communicationGame.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/comparisonOperators1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/comparisonOperators2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/componentSplitting1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/concatJoin.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/concatTuple1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/condTwoAssertFalse.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalMeasurement2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/conditionalModulo.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockCapture.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockClassical.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming11_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming12.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming13.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming14.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constBlockConsuming9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constCaptureBad1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constantLengthSlice1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/constantLengthSlice2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumeAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumeDepTypeVar.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/consumingSquare.slq @@ -160,17 +304,36 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertMatch2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertNatToInt.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertNatVectorToRealArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertTuple.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertUintToArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertVectors.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/convertVectors2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/deadCode6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCapture1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond10.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depCond9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depConsume1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depConsume2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depConsume3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depIndexReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depIndexReplace2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depIndexReplace3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depSplit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depSwap1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTest3.slq @@ -185,16 +348,21 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depType2_1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depType3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/depType4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTypeSplit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depTypeSplit2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/depVecType.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dependencyLoop1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dependencyLoop2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dependencyLoop3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/detectZero.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguish0H0_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishGHZandW.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/distinguishStates.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/divQ.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero2.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/divmod.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/divbyzero3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dlog.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/draper.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/draperFunny.slq @@ -206,7 +374,20 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupClosure2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/dupConvertForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleIndex1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleIndex2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleIndex3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleIndex4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleSlice1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleSlice2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/dynamicTupleSlice3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn10A.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn12.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn13.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn14.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn4.slq @@ -214,11 +395,33 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturn9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoop1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoop2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoop3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoopLowering1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoopLowering2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnLoopLowering3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnQuantumIf.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnQuantumIf2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/earlyReturnQuantumIf3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/elementwiseMove.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/errorLoopSplit.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/errorNonasciiWide.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/evalCoerceSub.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/evalConversion.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/evalDecimal.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/evalFixedInt.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/evalSubZero.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/expand1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/expand2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/expand3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/expand4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/extendTruncate.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/extendTruncateError.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fib2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassFunction1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor10.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor2.slq @@ -229,9 +432,17 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor8.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/firstClassTypeConstructor9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/fixedPointWithMoved.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/flipAll.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/floatOps.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/for.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forStep4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCapture1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCapture2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCapture3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetChain.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetClassical.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetCoerce.slq @@ -246,41 +457,69 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetDup2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElse.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIfThenElseInvalid.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIndex.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetIndexSlice.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetLoop1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetNonReconstructableInvalid.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetRedefine.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSpecialPatterns.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesis4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetSynthesisRec.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/forgetWhile.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/fromW.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionAlias2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionBodyParseError.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionCallEval1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionCallEval2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/functionSubtype1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericAddition.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericReverse4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericSubtyping1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/genericSubtyping2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/grover2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/groverDiffusion.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/hIndex.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/hideAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/hidingIndexReplacement.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/higherOrderReverse.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/higherOrderReverse2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/idivbyzero.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifError.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifFalseReassign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ifSuperposition3.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDup.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDup1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDup2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/implicitDupLifted.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/inOwnType.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/incompatibleFunDef.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexAssignDep.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexEmptyTuple.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign3_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOpAssign6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds10.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds11.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds12.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds13.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds14.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds15.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds16.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds17.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds18.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexOutOfBounds4.slq @@ -295,16 +534,26 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplace4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplace5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplace6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplace7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceAlias1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceAlias2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceConstAccess.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceConsume.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceDiagnostic1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceDiagnostic2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceError2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceError3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceErrorRhs.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceId.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexReplaceIfFunctionCall.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/indexRewriteContext.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/infiniteType1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/infiniteType2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/infiniteType3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/innerProduct2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/intLt.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/intLt2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/intUintBoolConversion.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/integerPhase.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/invQ.slq @@ -316,25 +565,111 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ite6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteCondError.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteLhs.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteLhs2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteQuantumPromote1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteQuantumPromote2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteQuantumPromote3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteType1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/iteType2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/iverson.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaCallLhs1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaCallLhs2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaEq.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/lambdaLhs.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthConstFold.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthConstFold1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthConstFold2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/lengthMismatch.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsForget1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsForget2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsForget3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsForget4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsTypeAnnotation1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsTypeAnnotation2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsTypeAnnotation2_1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsTypeAnnotation3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lhsTypeAnnotation4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConstArg.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming4_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming5_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedConsuming7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedMeasure1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedMeasure2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedMeasure3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedMeasure4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/liftedMeasure5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/localVariableInFunctionReturnTypeError.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit1_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/logicShortCircuit9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/longTuple1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFixedPoint6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopForgetRedefine1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopForgetRedefine2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFunctionDef.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFunctionDef2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopFunctionDef3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/loopyFunctionAnnotation1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerForLoopAssign.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoop5_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopBool.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopCaptureClassicalOpAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopCaptureClassicalOpAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopCaptureOpAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopCaptureOpAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopCommunicationGame.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopConst.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopDlog.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn5_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopEarlyReturn6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopForStep1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopForStep2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopForStep3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopForget2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopMultiDimAssign.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopShadowConst.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerLoopShor.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerRepeat1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerRepeat2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/lowerTupleConcat.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/majorityOracle.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2_3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/makeWPower2_4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/manualPhaseEstimation.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/manualPhaseEstimation2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/map1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/map2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/map3.slq @@ -347,15 +682,25 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureFun2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureHadamard.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureReversePhase.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureUint.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureReversePhase2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureReversePhase3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureUint1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureUint2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/measureVector.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mergeDependent1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mergeImplicitForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mergeImplicitForget2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mergeImplicitForget3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/mergeTupleArray1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mfreeImplicitForget.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mixed5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/modZero.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiConvert.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiDimAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiDimReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiForget.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiIndex1.slq @@ -364,20 +709,34 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/multiResultIndexReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/mustConsumeNonLifted.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nVecToQArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nandTree.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/natTypes.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestInf.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedCapture.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedClosure.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedForLoop.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedGlobal.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedIndexReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedMeasure.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedMutualRecursion1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedReplace.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/nestedTupleMatch.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/neverArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/newForLoopRangeSyntax.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/noImplicitForget.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/noLengthAssign.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/noQnumericJoin.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nonLiftedH1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nonLiftedIndexReplacement1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/nonLiftedIndexReplacement2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/opAssignReverse.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/paramNotConsumedError.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterSubtyping1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterSubtyping2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterSubtyping3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterSubtyping4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterSubtyping5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parameterizedSimulation.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseArrayOfVectorReturn.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/parseError.slq @@ -390,8 +749,13 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch11.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch12.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2_3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch2_4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch4_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch4_3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch7.slq @@ -399,36 +763,108 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/patternMatch9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseEstimation.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/phaseQ.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/photon.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/piToRat.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/pow1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/pow2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/pow3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/pow4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/print.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/projectForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/promoteQbitArithmetic.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qft.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qftPretty.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumeric1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumeric2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumeric3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/qnumericError6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumBitNotMinus.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumClassicalSubtyping.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumControlClassicalAssignment.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfClassicalUpdate3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfSuperpositionSizeOneCondition1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIfSuperpositionSizeOneCondition2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndex1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndex2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndex3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexAssign7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexPromote1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexUpdate1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumIndexUpdate2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumOuterParams.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumReplace.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumReplaceOutOfBounds.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumSub1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/quantumSub2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/quid-updates.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/rationalBitwiseOr.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/rationalPhase.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignArrayLength.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignConst.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDepVar.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reassignDependentTypeParameter.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursion.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionCapture6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionRecapture1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn12.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn13.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn14.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn15.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn16.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn17.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveFunctionReturn9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/recursiveNested6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/renatoCommunicationGameV1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeat100.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/repeatUntil.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceClassical.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndex.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndex1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndex2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexBad1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexBad2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexClassical1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexClassical2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexConsumeLifted1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti0.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti12.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti4.slq @@ -436,11 +872,32 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexMulti9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexOutOfBounds1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexOutOfBounds2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexOutOfBounds3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexOutOfBounds4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceIndexOutOfBounds5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceSlice1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceSlice2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/replaceSlice3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/ret2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/retClosure.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/retPi.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/retTypeCrash1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/retTypeCrash2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reuseCapturedName.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/revDefLhs1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/revDefLhs2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseApplyNested.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseArithmetic.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseBadLength.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseCNOT.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseConstUnit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseConstUnit2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseConstUnit3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseConstUnit4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseCtype.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseDependent.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseEarlyReturn.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseFlatten.slq @@ -454,44 +911,118 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseId8.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseImplicitForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseLambda.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseLifted.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseMeasureNonClassical.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePair.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reversePhase3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRecursiveNested1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRecursiveNested2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRewrites.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotX.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotY.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotY2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseRotZ.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSingletonArg.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare12.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare13.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare14.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare5.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSquare9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseSubtype.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseToW.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseUintId.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseUnpack.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseWrongNargs.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseX.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/reverseX2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/scientificNotation1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/semiclassicalQFT1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/semiclassicalQFT2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCapture1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCapture2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCapture3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCapture4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowCaptured.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowIndexReplacement1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowIndexReplacement1_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shadowing.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/shor.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shortCircuitAnd1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/shortCircuitOrAssign1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/simpleSwap.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sinQ.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/singletonVectorHadamard.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/sliceOutOfBounds1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sliceReplacement.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/sliceUnit.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/sliceUnitOutOfBounds.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/sliceUnitResultOutOfBounds.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/specialReverseTypeChecking.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/specialReverseTypeChecking2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArray1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArray2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst1_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitArrayConst2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitComponents1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitMixed1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitMixed2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitMixed3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitTuple1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitTuple2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitTuple3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitTuple4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitTuple5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitVector1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/splitVector2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionLhs.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionLhsConst.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionLhsConst2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionLhsConst3.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionReplace.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionReplace1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/squareFunctionReplace2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongIndexUpdate6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates12.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/strongUpdates9.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/subAssign1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/subAssign2.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/subtyping.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/subtyping1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/subtyping2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sumArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/sumIota.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray.slq @@ -499,11 +1030,19 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapArray5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapClassicalInt.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapClosures.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapDiffArrays.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapEmptyIf.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapInt.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapNoSwap.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapTuple7.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapVarWithComponent.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/swapVarWithComponent2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/teleportation.slq @@ -517,8 +1056,18 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testForget.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testGenericConvert1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testGenericConvert2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testGenericConvert2_1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testHadamard.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testLiftedClassical.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod2_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod3_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod3_3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/testMod6.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testParamSameName.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testPunning.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testQFT.slq @@ -540,31 +1089,101 @@ bin/silq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/testUnsafeCaptureConst4.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tf.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tf_orig.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tf_snippet.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/thirds.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/transpose.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleComp.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompLongVec1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompLongVec2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompLongVec3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompLongVec4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompLongVec5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleCompVec1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/tupleConversion.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAlias.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAlias2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAlias3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAliasIf1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAliasIf2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeAsStatement.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckBadLength.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckBadPolyPauliRotY.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckBadReverseLength.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckLinearRotY.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckMakeIntegerComparator.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckMkVec.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckNextCoeffs.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckPolyPauliRot.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeCheckWeightedAdder.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockCapture.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockForget1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockForget2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeConstBlockForget3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeError.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeError2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeEval1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeEval2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeFunCall.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeFunCallCoerce.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typePairError1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typePairError2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/typeof1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unaryOperators1.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/uncomputeOnArrayAssignment.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/undefLhs.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unicodeLoc.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unidiomaticBell.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unitParamClosureArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unitParamClosureArray2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unitParamClosureArray3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unitRedefinition.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unpackError.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/unreachableConsume.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/unrealizableError.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/variadic1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/variadic2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/variadic3.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorConv.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorLength.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorLiteral1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorLiteral2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorReverse.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/vectorToArray.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/warning.slq -%%PORTEXAMPLES%%%%EXAMPLESDIR%%/while.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/while1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/while1_2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/while2.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/whileFunctionCall.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardArray.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardArraySplit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardArraySplit2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardArraySplit3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardArraySplit4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardForget.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardForget2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVec1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVec2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVecSplit1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVecSplit2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVecSplit3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcardVecSplit4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/wildcards1.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with10.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with11.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with12.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with12_2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with12_3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with2.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with3.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with4.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with5.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with6.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with7.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with8.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with9.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/withAbort.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/with_.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/wrapX.slq %%PORTEXAMPLES%%%%EXAMPLESDIR%%/xwing.slq +%%PORTEXAMPLES%%%%EXAMPLESDIR%%/zeno.slq |