diff options
Diffstat (limited to 'java/openjdk18/files')
| -rw-r--r-- | java/openjdk18/files/extra-patch-src_hotspot_share_runtime_arguments.cpp | 21 | ||||
| -rw-r--r-- | java/openjdk18/files/patch-src_hotspot_os__cpu_bsd__aarch64_atomic__bsd__aarch64.S | 31 |
2 files changed, 21 insertions, 31 deletions
diff --git a/java/openjdk18/files/extra-patch-src_hotspot_share_runtime_arguments.cpp b/java/openjdk18/files/extra-patch-src_hotspot_share_runtime_arguments.cpp new file mode 100644 index 000000000000..80ef25c560f6 --- /dev/null +++ b/java/openjdk18/files/extra-patch-src_hotspot_share_runtime_arguments.cpp @@ -0,0 +1,21 @@ +--- src/hotspot/share/runtime/arguments.cpp.orig 2023-01-15 10:13:55.469227000 -0800 ++++ src/hotspot/share/runtime/arguments.cpp 2023-01-15 10:20:49.218102000 -0800 +@@ -1557,6 +1557,10 @@ + // set_use_compressed_oops(). + void Arguments::set_use_compressed_klass_ptrs() { + #ifdef _LP64 ++# if defined(__FreeBSD__) && defined(AARCH64) ++ FLAG_SET_DEFAULT(UseCompressedClassPointers, false); ++ FLAG_SET_ERGO(UseCompressedClassPointers, false); ++# else + // On some architectures, the use of UseCompressedClassPointers implies the use of + // UseCompressedOops. The reason is that the rheap_base register of said platforms + // is reused to perform some optimized spilling, in order to use rheap_base as a +@@ -1582,6 +1586,7 @@ + } + } + } ++# endif // __FreeBSD__ && AARCH64 + #endif // _LP64 + } + diff --git a/java/openjdk18/files/patch-src_hotspot_os__cpu_bsd__aarch64_atomic__bsd__aarch64.S b/java/openjdk18/files/patch-src_hotspot_os__cpu_bsd__aarch64_atomic__bsd__aarch64.S deleted file mode 100644 index 35c926fd1a0a..000000000000 --- a/java/openjdk18/files/patch-src_hotspot_os__cpu_bsd__aarch64_atomic__bsd__aarch64.S +++ /dev/null @@ -1,31 +0,0 @@ ---- src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.S -+++ src/hotspot/os_cpu/bsd_aarch64/atomic_bsd_aarch64.S -@@ -47,6 +47,28 @@ aarch64_atomic_fetch_add_4_default_impl: - mov w0, w2 - ret - -+ .global aarch64_atomic_fetch_add_8_relaxed_default_impl -+ .align 5 -+aarch64_atomic_fetch_add_8_relaxed_default_impl: -+ prfm pstl1strm, [x0] -+0: ldxr x2, [x0] -+ add x8, x2, x1 -+ stxr w9, x8, [x0] -+ cbnz w9, 0b -+ mov x0, x2 -+ ret -+ -+ .global aarch64_atomic_fetch_add_4_relaxed_default_impl -+ .align 5 -+aarch64_atomic_fetch_add_4_relaxed_default_impl: -+ prfm pstl1strm, [x0] -+0: ldxr w2, [x0] -+ add w8, w2, w1 -+ stxr w9, w8, [x0] -+ cbnz w9, 0b -+ mov w0, w2 -+ ret -+ - .globl aarch64_atomic_xchg_4_default_impl - .align 5 - aarch64_atomic_xchg_4_default_impl: |
