diff options
Diffstat (limited to 'devel/avr-gcc/files/patch-bug11259')
-rw-r--r-- | devel/avr-gcc/files/patch-bug11259 | 107 |
1 files changed, 11 insertions, 96 deletions
diff --git a/devel/avr-gcc/files/patch-bug11259 b/devel/avr-gcc/files/patch-bug11259 index 9f98ee5437fc..aaf7a37c59b3 100644 --- a/devel/avr-gcc/files/patch-bug11259 +++ b/devel/avr-gcc/files/patch-bug11259 @@ -1,16 +1,7 @@ -Index: gcc/config/avr/avr.md -=================================================================== ---- gcc/config/avr/avr.md (revision 129892) -+++ gcc/config/avr/avr.md (working copy) -@@ -45,21 +45,22 @@ - (REG_SP 32) - (TMP_REGNO 0) ; temporary register r0 - (ZERO_REGNO 1) ; zero register r1 - - (SREG_ADDR 0x5F) - (RAMPZ_ADDR 0x5B) - - (UNSPEC_STRLEN 0) +diff -ur ../gcc-4.3.4.orig/gcc/config/avr/avr.md ./gcc/config/avr/avr.md +--- ../gcc-4.3.4.orig/gcc/config/avr/avr.md 2009-10-02 15:08:58.000000000 +0200 ++++ ./gcc/config/avr/avr.md 2009-10-02 15:09:26.000000000 +0200 +@@ -54,6 +54,7 @@ (UNSPEC_INDEX_JMP 1) (UNSPEC_SEI 2) (UNSPEC_CLI 3) @@ -18,23 +9,9 @@ Index: gcc/config/avr/avr.md (UNSPECV_PROLOGUE_SAVES 0) (UNSPECV_EPILOGUE_RESTORES 1)]) - - (include "predicates.md") - (include "constraints.md") - - ;; Condition code settings. - (define_attr "cc" "none,set_czn,set_zn,set_n,compare,clobber" - (const_string "none")) -@@ -1185,20 +1186,33 @@ - return (AS2 (andi, %A0,lo8(%2)) CR_TAB - AS2 (andi, %B0,hi8(%2)) CR_TAB - AS2 (andi, %C0,hlo8(%2)) CR_TAB - AS2 (andi, %D0,hhi8(%2))); - } - return \"bug\"; - }" +@@ -1183,6 +1184,19 @@ [(set_attr "length" "4,4") - (set_attr "cc" "set_n,set_n")]) + (set_attr "cc" "set_n,clobber")]) +(define_peephole2 ; andi + [(set (match_operand:QI 0 "d_register_operand" "") @@ -52,21 +29,7 @@ Index: gcc/config/avr/avr.md ;;||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ;; ior - (define_insn "iorqi3" - [(set (match_operand:QI 0 "register_operand" "=r,d") - (ior:QI (match_operand:QI 1 "register_operand" "%0,0") - (match_operand:QI 2 "nonmemory_operand" "r,i")))] - "" - "@ - or %0,%2 -@@ -1313,24 +1327,71 @@ - (xor:SI (match_operand:SI 1 "register_operand" "%0") - (match_operand:SI 2 "register_operand" "r")))] - "" - "eor %0,%2 - eor %B0,%B2 - eor %C0,%C2 - eor %D0,%D2" +@@ -1311,10 +1325,57 @@ [(set_attr "length" "4") (set_attr "cc" "set_n")]) @@ -125,21 +88,7 @@ Index: gcc/config/avr/avr.md [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r") (ashift:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0") (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))] - "" - "* return ashlqi3_out (insn, operands, NULL);" - [(set_attr "length" "5,0,1,2,4,6,9") - (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")]) - - (define_insn "ashlhi3" - [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r") -@@ -1346,20 +1407,61 @@ - (ashift:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0") - (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))] - "" - "* return ashlsi3_out (insn, operands, NULL);" - [(set_attr "length" "8,0,4,4,8,10,12") - (set_attr "cc" "clobber,none,set_n,clobber,set_n,clobber,clobber")]) - +@@ -1344,6 +1405,47 @@ ;; Optimize if a scratch register from LD_REGS happens to be available. (define_peephole2 @@ -187,21 +136,7 @@ Index: gcc/config/avr/avr.md [(match_scratch:QI 3 "d") (set (match_operand:HI 0 "register_operand" "") (ashift:HI (match_operand:HI 1 "register_operand" "") - (match_operand:QI 2 "const_int_operand" "")))] - "" - [(parallel [(set (match_dup 0) (ashift:HI (match_dup 1) (match_dup 2))) - (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") - -@@ -1464,21 +1566,63 @@ - (match_operand:QI 2 "const_int_operand" "L,P,O,n"))) - (clobber (match_scratch:QI 3 "=X,X,X,&d"))] - "reload_completed" - "* return ashrsi3_out (insn, operands, NULL);" - [(set_attr "length" "0,4,4,10") - (set_attr "cc" "none,clobber,set_n,clobber")]) - +@@ -1462,7 +1564,49 @@ ;; >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> >> ;; logical shift right @@ -252,21 +187,7 @@ Index: gcc/config/avr/avr.md [(set (match_operand:QI 0 "register_operand" "=r,r,r,r,!d,r,r") (lshiftrt:QI (match_operand:QI 1 "register_operand" "0,0,0,0,0,0,0") (match_operand:QI 2 "general_operand" "r,L,P,K,n,n,Qm")))] - "" - "* return lshrqi3_out (insn, operands, NULL);" - [(set_attr "length" "5,0,1,2,4,6,9") - (set_attr "cc" "clobber,none,set_czn,set_czn,set_czn,set_czn,clobber")]) - - (define_insn "lshrhi3" - [(set (match_operand:HI 0 "register_operand" "=r,r,r,r,r,r,r") -@@ -1494,20 +1638,61 @@ - (lshiftrt:SI (match_operand:SI 1 "register_operand" "0,0,0,r,0,0,0") - (match_operand:QI 2 "general_operand" "r,L,P,O,K,n,Qm")))] - "" - "* return lshrsi3_out (insn, operands, NULL);" - [(set_attr "length" "8,0,4,4,8,10,12") - (set_attr "cc" "clobber,none,clobber,clobber,clobber,clobber,clobber")]) - +@@ -1492,6 +1636,47 @@ ;; Optimize if a scratch register from LD_REGS happens to be available. (define_peephole2 @@ -314,10 +235,4 @@ Index: gcc/config/avr/avr.md [(match_scratch:QI 3 "d") (set (match_operand:HI 0 "register_operand" "") (lshiftrt:HI (match_operand:HI 1 "register_operand" "") - (match_operand:QI 2 "const_int_operand" "")))] - "" - [(parallel [(set (match_dup 0) (lshiftrt:HI (match_dup 1) (match_dup 2))) - (clobber (match_dup 3))])] - "if (!avr_peep2_scratch_safe (operands[3])) - FAIL;") - +Only in ./gcc/config/avr: avr.md.orig |