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-rw-r--r--cad/p5-Verilog-Perl/pkg-descr2
1 files changed, 0 insertions, 2 deletions
diff --git a/cad/p5-Verilog-Perl/pkg-descr b/cad/p5-Verilog-Perl/pkg-descr
index 69719b466c56..71fc00f6372e 100644
--- a/cad/p5-Verilog-Perl/pkg-descr
+++ b/cad/p5-Verilog-Perl/pkg-descr
@@ -15,5 +15,3 @@ language. It includes:
First, you run vrename to create a list of signals in the design. You then
edit this list, changing as many symbols as you wish. Vrename is then run a
second time to apply the changes.
-
-WWW: https://www.veripool.org/wiki/verilog-perl