java/openjdk8: allow using DSCR on powerpc64

DSCR was disabled because of a bug in stable/12.
Additionally, remove ELFv1 support.

6 files changed, 39 insertions, 198 deletions

diff --git a/java/openjdk8/Makefile b/java/openjdk8/Makefile
index 430d1e24627e..df20cacab182 100644
--- a/java/openjdk8/Makefile
+++ b/java/openjdk8/Makefile
@@ -1,5 +1,6 @@
 PORTNAME=	openjdk
 PORTVERSION=	${JDK_MAJOR_VERSION}.${JDK_UPDATE_VERSION}.${JDK_BUILD_NUMBER}.${BSD_JDK_VERSION}
+PORTREVISION=	1
 CATEGORIES=	java devel
 MASTER_SITES=	LOCAL/jkim:jtreg
 PKGNAMESUFFIX?=	${JDK_MAJOR_VERSION}
@@ -233,12 +234,7 @@ MAKE_ARGS+=	USE_PRECOMPILED_HEADER=0
 .endif
 .endif
 
-.if defined(PPC_ABI) && ${PPC_ABI} == ELFv2
-EXTRA_PATCHES+= ${FILESDIR}/extra-patch-ppc64-elfv2
-MAKE_ARGS+=	USE_PRECOMPILED_HEADER=0
-.endif
-
-.if ${ARCH} == powerpc64le
+.if ${ARCH:Mpowerpc64*}
 MAKE_ARGS+=	USE_PRECOMPILED_HEADER=0
 .endif
 
diff --git a/java/openjdk8/files/extra-patch-ppc64-elfv2 b/java/openjdk8/files/extra-patch-ppc64-elfv2
deleted file mode 100644
index 63278894c1cf..000000000000
--- a/java/openjdk8/files/extra-patch-ppc64-elfv2
+++ /dev/null
@@ -1,37 +0,0 @@
---- common/autoconf/flags.m4.orig	2019-07-11 17:47:26.232244000 +0200
-+++ common/autoconf/flags.m4	2019-07-11 17:48:11.252733000 +0200
-@@ -563,7 +563,7 @@ AC_DEFUN_ONCE([FLAGS_SETUP_COMPILER_FLAGS_FOR_JDK],
-       CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DVM_BIG_ENDIAN"
-     fi
-   fi
--  if test "x$OPENJDK_TARGET_CPU" = xppc64le; then
-+  if test "x$OPENJDK_TARGET_CPU" = xppc64; then
-     CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DABI_ELFv2"
-   fi
-   
---- common/autoconf/generated-configure.sh.orig	2019-07-11 17:47:33.640280000 +0200
-+++ common/autoconf/generated-configure.sh	2019-07-11 17:49:51.392598000 +0200
-@@ -41992,7 +41992,7 @@ $as_echo "$supports" >&6; }
-       CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DVM_BIG_ENDIAN"
-     fi
-   fi
--  if test "x$OPENJDK_TARGET_CPU" = xppc64le; then
-+  if test "x$OPENJDK_TARGET_CPU" = xppc64; then
-     CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DABI_ELFv2"
-   fi
- 
---- hotspot/make/bsd/makefiles/ppc64.make.orig	2019-07-11 22:27:35.314715000 +0200
-+++ hotspot/make/bsd/makefiles/ppc64.make	2019-07-12 11:28:56.070546000 +0200
-@@ -37,11 +37,8 @@ ifeq ($(filter $(OPENJDK_TARGET_CPU_ENDIAN),big little
- endif
- 
- ifeq ($(OPENJDK_TARGET_CPU_ENDIAN),big)
--  # fixes `relocation truncated to fit' error for gcc 4.1.
--  CFLAGS += -mminimal-toc
--
-   # finds use ppc64 instructions, but schedule for power5
--  CFLAGS += -mcpu=powerpc64 -mtune=power5 -minsert-sched-nops=regroup_exact -mno-multiple -mno-string
-+  CFLAGS += -mcpu=powerpc64 -mtune=power5 -DABI_ELFv2
- else
-   # Little endian machine uses ELFv2 ABI.
-   CFLAGS += -DVM_LITTLE_ENDIAN -DABI_ELFv2
diff --git a/java/openjdk8/files/patch-common_autoconf_flags.m4 b/java/openjdk8/files/patch-common_autoconf_flags.m4
new file mode 100644
index 000000000000..ec7aeafa54a7
--- /dev/null
+++ b/java/openjdk8/files/patch-common_autoconf_flags.m4
@@ -0,0 +1,11 @@
+--- common/autoconf/flags.m4.orig	2024-01-02 12:56:28 UTC
++++ common/autoconf/flags.m4
+@@ -642,7 +642,7 @@ AC_DEFUN_ONCE([FLAGS_SETUP_COMPILER_FLAGS_FOR_JDK],
+       CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DVM_BIG_ENDIAN"
+     fi
+   fi
+-  if test "x$OPENJDK_TARGET_CPU" = xppc64le; then
++  if test "x$OPENJDK_TARGET_CPU" = xppc64le -o "x$OPENJDK_TARGET_CPU" = xppc64; then
+     CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DABI_ELFv2"
+   fi
+   
diff --git a/java/openjdk8/files/patch-common_autoconf_generated-configure.sh b/java/openjdk8/files/patch-common_autoconf_generated-configure.sh
new file mode 100644
index 000000000000..3b0e94973cd3
--- /dev/null
+++ b/java/openjdk8/files/patch-common_autoconf_generated-configure.sh
@@ -0,0 +1,11 @@
+--- common/autoconf/generated-configure.sh.orig	2024-01-02 12:56:13 UTC
++++ common/autoconf/generated-configure.sh
+@@ -43317,7 +43317,7 @@ $as_echo "$supports" >&6; }
+       CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DVM_BIG_ENDIAN"
+     fi
+   fi
+-  if test "x$OPENJDK_TARGET_CPU" = xppc64le; then
++  if test "x$OPENJDK_TARGET_CPU" = xppc64le -o "x$OPENJDK_TARGET_CPU" = xppc64; then
+     CCXXFLAGS_JDK="$CCXXFLAGS_JDK -DABI_ELFv2"
+   fi
+ 
diff --git a/java/openjdk8/files/patch-hotspot_make_bsd_makefiles_ppc64.make b/java/openjdk8/files/patch-hotspot_make_bsd_makefiles_ppc64.make
new file mode 100644
index 000000000000..06f1628232b8
--- /dev/null
+++ b/java/openjdk8/files/patch-hotspot_make_bsd_makefiles_ppc64.make
@@ -0,0 +1,15 @@
+--- hotspot/make/bsd/makefiles/ppc64.make.orig	2024-01-02 13:01:01 UTC
++++ hotspot/make/bsd/makefiles/ppc64.make
+@@ -37,11 +37,7 @@ ifeq ($(OPENJDK_TARGET_CPU_ENDIAN),big)
+ endif
+ 
+ ifeq ($(OPENJDK_TARGET_CPU_ENDIAN),big)
+-  # fixes `relocation truncated to fit' error for gcc 4.1.
+-  CFLAGS += -mminimal-toc
+-
+-  # finds use ppc64 instructions, but schedule for power5
+-  CFLAGS += -mcpu=powerpc64 -mtune=power5 -minsert-sched-nops=regroup_exact -mno-multiple -mno-string
++  CFLAGS += -mcpu=powerpc64 -mtune=power5 -DABI_ELFv2
+ else
+   # Little endian machine uses ELFv2 ABI.
+   CFLAGS += -DVM_LITTLE_ENDIAN -DABI_ELFv2
diff --git a/java/openjdk8/files/patch-hotspot_src_cpu_ppc_vm_stubGenerator__ppc.cpp b/java/openjdk8/files/patch-hotspot_src_cpu_ppc_vm_stubGenerator__ppc.cpp
deleted file mode 100644
index 156f35366c25..000000000000
--- a/java/openjdk8/files/patch-hotspot_src_cpu_ppc_vm_stubGenerator__ppc.cpp
+++ /dev/null
@@ -1,155 +0,0 @@
---- hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp.orig	2019-07-22 16:46:38 UTC
-+++ hotspot/src/cpu/ppc/vm/stubGenerator_ppc.cpp
-@@ -1212,12 +1212,6 @@ class StubGenerator: public StubCodeGenerator {
-       // Prefetch the data into the L2 cache.
-       __ dcbt(R3_ARG1, 0);
- 
--      // If supported set DSCR pre-fetch to deepest.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--        __ mtdscr(tmp2);
--      }
--
-       __ li(tmp1, 16);
- 
-       // Backbranch target aligned to 32-byte. Not 16-byte align as
-@@ -1236,12 +1230,6 @@ class StubGenerator: public StubCodeGenerator {
-       __ addi(R4_ARG2, R4_ARG2, 32);       // Update dsc+=32
-       __ bdnz(l_10);                       // Dec CTR and loop if not zero.
- 
--      // Restore DSCR pre-fetch value.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--        __ mtdscr(tmp2);
--      }
--
-     } // VSX
-    } // FasterArrayCopy
- 
-@@ -1481,11 +1469,6 @@ class StubGenerator: public StubCodeGenerator {
-         // Prefetch src data into L2 cache.
-         __ dcbt(R3_ARG1, 0);
- 
--        // If supported set DSCR pre-fetch to deepest.
--        if (VM_Version::has_mfdscr()) {
--          __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--          __ mtdscr(tmp2);
--        }
-         __ li(tmp1, 16);
- 
-         // Backbranch target aligned to 32-byte. It's not aligned 16-byte
-@@ -1504,12 +1487,6 @@ class StubGenerator: public StubCodeGenerator {
-         __ addi(R4_ARG2, R4_ARG2, 32);       // Update dsc+=32.
-         __ bdnz(l_9);                        // Dec CTR and loop if not zero.
- 
--        // Restore DSCR pre-fetch value.
--        if (VM_Version::has_mfdscr()) {
--          __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--          __ mtdscr(tmp2);
--        }
--
-       }
-     } // FasterArrayCopy
-     __ bind(l_6);
-@@ -1674,12 +1651,6 @@ class StubGenerator: public StubCodeGenerator {
-       // Prefetch the data into the L2 cache.
-       __ dcbt(R3_ARG1, 0);
- 
--      // If supported set DSCR pre-fetch to deepest.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--        __ mtdscr(tmp2);
--      }
--
-       __ li(tmp1, 16);
- 
-       // Backbranch target aligned to 32-byte. Not 16-byte align as
-@@ -1698,12 +1669,6 @@ class StubGenerator: public StubCodeGenerator {
-       __ addi(R4_ARG2, R4_ARG2, 32);       // Update dsc+=32
-       __ bdnz(l_7);                        // Dec CTR and loop if not zero.
- 
--      // Restore DSCR pre-fetch value.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--        __ mtdscr(tmp2);
--      }
--
-     } // VSX
-    } // FasterArrayCopy
- 
-@@ -1821,12 +1786,6 @@ class StubGenerator: public StubCodeGenerator {
-       // Prefetch the data into the L2 cache.
-       __ dcbt(R3_ARG1, 0);
- 
--      // If supported set DSCR pre-fetch to deepest.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--        __ mtdscr(tmp2);
--      }
--
-       __ li(tmp1, 16);
- 
-       // Backbranch target aligned to 32-byte. Not 16-byte align as
-@@ -1845,11 +1804,6 @@ class StubGenerator: public StubCodeGenerator {
-       __ stxvd2x(tmp_vsr1, R4_ARG2);       // Store to dst
-       __ bdnz(l_4);
- 
--      // Restore DSCR pre-fetch value.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--        __ mtdscr(tmp2);
--      }
-      }
- 
-       __ cmpwi(CCR0, R5_ARG3, 0);
-@@ -1949,12 +1903,6 @@ class StubGenerator: public StubCodeGenerator {
-       // Prefetch the data into the L2 cache.
-       __ dcbt(R3_ARG1, 0);
- 
--      // If supported set DSCR pre-fetch to deepest.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--        __ mtdscr(tmp2);
--      }
--
-       __ li(tmp1, 16);
- 
-       // Backbranch target aligned to 32-byte. Not 16-byte align as
-@@ -1973,12 +1921,6 @@ class StubGenerator: public StubCodeGenerator {
-       __ addi(R4_ARG2, R4_ARG2, 32);       // Update dsc+=32
-       __ bdnz(l_5);                        // Dec CTR and loop if not zero.
- 
--      // Restore DSCR pre-fetch value.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--        __ mtdscr(tmp2);
--      }
--
-     } // VSX
-    } // FasterArrayCopy
- 
-@@ -2074,12 +2016,6 @@ class StubGenerator: public StubCodeGenerator {
-       // Prefetch the data into the L2 cache.
-       __ dcbt(R3_ARG1, 0);
- 
--      // If supported set DSCR pre-fetch to deepest.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val | 7);
--        __ mtdscr(tmp2);
--      }
--
-       __ li(tmp1, 16);
- 
-       // Backbranch target aligned to 32-byte. Not 16-byte align as
-@@ -2098,11 +2034,6 @@ class StubGenerator: public StubCodeGenerator {
-       __ stxvd2x(tmp_vsr1, R4_ARG2);       // Store to dst
-       __ bdnz(l_4);
- 
--      // Restore DSCR pre-fetch value.
--      if (VM_Version::has_mfdscr()) {
--        __ load_const_optimized(tmp2, VM_Version::_dscr_val);
--        __ mtdscr(tmp2);
--      }
-      }
- 
-       __ cmpwi(CCR0, R5_ARG3, 0);