diff options
| author | Ganael LAPLANCHE <martymac@FreeBSD.org> | 2025-07-01 12:03:59 +0200 |
|---|---|---|
| committer | Ganael LAPLANCHE <martymac@FreeBSD.org> | 2025-07-01 12:09:23 +0200 |
| commit | 9cc6248ca1ef107c06a9e9b392ed13c7ef277ca4 (patch) | |
| tree | 14d403de904cab89c1eefe6f774c8eec77ac1a56 /devel/simgear/files/patch-simgear-structure-SGAtomic.cxx | |
| parent | ftp/bsdftpd-ssl: reset maintainer. (diff) | |
games/flightgear: Update to 2024.1.1
Also:
- Switch upstream to Gitlab for code + download.flightgear.org for data
- Switch to c++17
PR: 287776 287777 287778
Reported by: Stefan Rumetshofer <sterum77@gmail.com>
Diffstat (limited to 'devel/simgear/files/patch-simgear-structure-SGAtomic.cxx')
| -rw-r--r-- | devel/simgear/files/patch-simgear-structure-SGAtomic.cxx | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/devel/simgear/files/patch-simgear-structure-SGAtomic.cxx b/devel/simgear/files/patch-simgear-structure-SGAtomic.cxx new file mode 100644 index 000000000000..cb8ae35e2761 --- /dev/null +++ b/devel/simgear/files/patch-simgear-structure-SGAtomic.cxx @@ -0,0 +1,53 @@ +Work around: + +SGAtomic.cxx:48:5: error: ISO C++17 does not allow 'register' storage class specifier [-Wregister] + +to fix build on i386 as Simgear uses CMAKE_CXX_STANDARD=17 + +--- simgear/structure/SGAtomic.cxx.orig 2025-06-30 14:48:03 UTC ++++ simgear/structure/SGAtomic.cxx +@@ -29,7 +29,7 @@ + #if defined(_WIN32) + # include <windows.h> + #elif defined(GCC_ATOMIC_BUILTINS_FOUND) +-#elif defined(__GNUC__) && defined(__i386__) ++#elif (__cplusplus < 201703L) && defined(__GNUC__) && defined(__i386__) + #elif defined(SGATOMIC_USE_MUTEX) + # include <mutex> + #else +@@ -43,7 +43,7 @@ SGAtomic::operator++() + return InterlockedIncrement(reinterpret_cast<long volatile*>(&mValue)); + #elif defined(GCC_ATOMIC_BUILTINS_FOUND) + return __sync_add_and_fetch(&mValue, 1); +-#elif defined(__GNUC__) && defined(__i386__) ++#elif (__cplusplus < 201703L) && defined(__GNUC__) && defined(__i386__) + register volatile unsigned* mem = reinterpret_cast<volatile unsigned*>(&mValue); + register unsigned result; + __asm__ __volatile__("lock; xadd{l} {%0,%1|%1,%0}" +@@ -64,7 +64,7 @@ SGAtomic::operator--() + return InterlockedDecrement(reinterpret_cast<long volatile*>(&mValue)); + #elif defined(GCC_ATOMIC_BUILTINS_FOUND) + return __sync_sub_and_fetch(&mValue, 1); +-#elif defined(__GNUC__) && defined(__i386__) ++#elif (__cplusplus < 201703L) && defined(__GNUC__) && defined(__i386__) + register volatile unsigned* mem = reinterpret_cast<volatile unsigned*>(&mValue); + register unsigned result; + __asm__ __volatile__("lock; xadd{l} {%0,%1|%1,%0}" +@@ -85,7 +85,7 @@ SGAtomic::operator unsigned() const + #elif defined(GCC_ATOMIC_BUILTINS_FOUND) + __sync_synchronize(); + return mValue; +-#elif defined(__GNUC__) && defined(__i386__) ++#elif (__cplusplus < 201703L) && defined(__GNUC__) && defined(__i386__) + __asm__ __volatile__("": : : "memory"); + return mValue; + #else +@@ -102,7 +102,7 @@ SGAtomic::compareAndExchange(unsigned oldValue, unsign + return oldValue == InterlockedCompareExchange(lvPtr, newValue, oldValue); + #elif defined(GCC_ATOMIC_BUILTINS_FOUND) + return __sync_bool_compare_and_swap(&mValue, oldValue, newValue); +-#elif defined(__GNUC__) && defined(__i386__) ++#elif (__cplusplus < 201703L) && defined(__GNUC__) && defined(__i386__) + register volatile unsigned* mem = reinterpret_cast<volatile unsigned*>(&mValue); + unsigned before; + __asm__ __volatile__("lock; cmpxchg{l} {%1,%2|%1,%2}" |