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authorJimmy Olgeni <olgeni@FreeBSD.org>2014-06-09 11:21:52 +0000
committerJimmy Olgeni <olgeni@FreeBSD.org>2014-06-09 11:21:52 +0000
commit37e782dfbc764c70ed1489c5c828d3c9ce5e4d65 (patch)
tree8d9caebfb388e25f19cd57fc86557a441d7cddff /cad/gplcver
parentUpdate to 5.9-20140607 (diff)
Remove indefinite articles and trailing periods from COMMENT, plus
minor COMMENT typos and surrounding whitespace fixes. Categories A-C. CR: D196 Approved by: portmgr (bapt)
Notes
Notes: svn path=/head/; revision=357139
Diffstat (limited to 'cad/gplcver')
-rw-r--r--cad/gplcver/Makefile2
1 files changed, 1 insertions, 1 deletions
diff --git a/cad/gplcver/Makefile b/cad/gplcver/Makefile
index 25537ee337a6..6c25425fe7d9 100644
--- a/cad/gplcver/Makefile
+++ b/cad/gplcver/Makefile
@@ -8,7 +8,7 @@ MASTER_SITES= SF/${PORTNAME}/${PORTNAME}/${PORTVERSION:R}${PORTVERSION:E}/
DISTNAME= ${PORTNAME}-${PORTVERSION:R}${PORTVERSION:E}.src
MAINTAINER= ports@FreeBSD.org
-COMMENT= A Verilog HDL simulator
+COMMENT= Verilog HDL simulator
USES= tar:bzip2 gmake