1 files changed, 0 insertions, 70 deletions
diff --git a/sysutils/xen-tools/files/xsa131-qemuu-7.patch b/sysutils/xen-tools/files/xsa131-qemuu-7.patch
deleted file mode 100644
index fa27fec84479..000000000000
--- a/sysutils/xen-tools/files/xsa131-qemuu-7.patch
+++ /dev/null
@@ -1,70 +0,0 @@
-xen/pt: add a few PCI config space field descriptions
-
-Since the next patch will turn all not explicitly described fields
-read-only by default, those fields that have guest writable bits need
-to be given explicit descriptors.
-
-This is a preparatory patch for XSA-131.
-
-Signed-off-by: Jan Beulich <jbeulich@suse.com>
----
-Notes:
-- blindly allowing all VPD reads may still be a problem (out of bounds
-  addresses aren't allowed, but the spec doesn't say what the effect
-  would be) ==> also an issue in pciback?
-- Vendor Specific cap regs aren't in the table (will become r/o by
-  default with this change)
-- many PCIe cap regs aren't in the table (will again become r/o)
-- same for PM cap regs at offsets 6 and 7
-
---- a/hw/xen/xen_pt_config_init.c
-+++ b/hw/xen/xen_pt_config_init.c
-@@ -756,6 +756,15 @@ static XenPTRegInfo xen_pt_emu_reg_vpd[]
-         .u.b.write  = xen_pt_byte_reg_write,
-     },
-     {
-+        .offset     = PCI_VPD_ADDR,
-+        .size       = 2,
-+        .ro_mask    = 0x0003,
-+        .emu_mask   = 0x0003,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-+    {
-         .size = 0,
-     },
- };
-@@ -891,6 +900,16 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[
-         .u.w.read   = xen_pt_word_reg_read,
-         .u.w.write  = xen_pt_word_reg_write,
-     },
-+    /* Device Status reg */
-+    {
-+        .offset     = PCI_EXP_DEVSTA,
-+        .size       = 2,
-+        .res_mask   = 0xFFC0,
-+        .ro_mask    = 0x0030,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-     /* Link Control reg */
-     {
-         .offset     = PCI_EXP_LNKCTL,
-@@ -902,6 +921,15 @@ static XenPTRegInfo xen_pt_emu_reg_pcie[
-         .u.w.read   = xen_pt_word_reg_read,
-         .u.w.write  = xen_pt_word_reg_write,
-     },
-+    /* Link Status reg */
-+    {
-+        .offset     = PCI_EXP_LNKSTA,
-+        .size       = 2,
-+        .ro_mask    = 0x3FFF,
-+        .init       = xen_pt_common_reg_init,
-+        .u.w.read   = xen_pt_word_reg_read,
-+        .u.w.write  = xen_pt_word_reg_write,
-+    },
-     /* Device Control 2 reg */
-     {
-         .offset     = 0x28,