From b91ca3ff3626dbb917aeb82243d140a50ad148b8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Lo=C3=AFc=20Bartoletti?= Date: Tue, 20 Apr 2021 06:54:15 +0200 Subject: databases/postgresql*: Fix build on riscv64 Reported by: tmunro Reviewed by: girgen --- .../files/patch-src_include_storage_s__lock.h | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 databases/postgresql13-server/files/patch-src_include_storage_s__lock.h (limited to 'databases/postgresql13-server') diff --git a/databases/postgresql13-server/files/patch-src_include_storage_s__lock.h b/databases/postgresql13-server/files/patch-src_include_storage_s__lock.h new file mode 100644 index 000000000000..19c945a36126 --- /dev/null +++ b/databases/postgresql13-server/files/patch-src_include_storage_s__lock.h @@ -0,0 +1,20 @@ +--- src/include/storage/s_lock.h.orig 2021-04-15 09:05:25 UTC ++++ src/include/storage/s_lock.h +@@ -320,7 +320,7 @@ tas(volatile slock_t *lock) + * We use the int-width variant of the builtin because it works on more chips + * than other widths. + */ +-#if defined(__arm__) || defined(__arm) || defined(__aarch64__) || defined(__aarch64) ++#if defined(__arm__) || defined(__arm) || defined(__aarch64__) || defined(__aarch64) || defined(__riscv) + #ifdef HAVE_GCC__SYNC_INT32_TAS + #define HAS_TEST_AND_SET + +@@ -337,7 +337,7 @@ tas(volatile slock_t *lock) + #define S_UNLOCK(lock) __sync_lock_release(lock) + + #endif /* HAVE_GCC__SYNC_INT32_TAS */ +-#endif /* __arm__ || __arm || __aarch64__ || __aarch64 */ ++#endif /* __arm__ || __arm || __aarch64__ || __aarch64 || __riscv */ + + + /* S/390 and S/390x Linux (32- and 64-bit zSeries) */ -- cgit v1.2.3