diff options
Diffstat (limited to 'www/ungoogled-chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h')
| -rw-r--r-- | www/ungoogled-chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/www/ungoogled-chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h b/www/ungoogled-chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h new file mode 100644 index 000000000000..573e4f35e54d --- /dev/null +++ b/www/ungoogled-chromium/files/patch-v8_src_wasm_baseline_ia32_liftoff-assembler-ia32-inl.h @@ -0,0 +1,128 @@ +--- v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h.orig 2023-12-23 12:33:28 UTC ++++ v8/src/wasm/baseline/ia32/liftoff-assembler-ia32-inl.h +@@ -487,7 +487,7 @@ void LiftoffAssembler::StoreTaggedPointer(Register dst + } + + void LiftoffAssembler::Load(LiftoffRegister dst, Register src_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LoadType type, uint32_t* protected_load_pc, + bool /* is_load_mem */, bool /* i64_offset */, + bool needs_shift) { +@@ -567,7 +567,7 @@ void LiftoffAssembler::Load(LiftoffRegister dst, Regis + } + + void LiftoffAssembler::Store(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister src, ++ uintptr_t offset_imm, LiftoffRegister src, + StoreType type, LiftoffRegList pinned, + uint32_t* protected_store_pc, + bool /* is_store_mem */, bool /* i64_offset */) { +@@ -647,7 +647,7 @@ void LiftoffAssembler::Store(Register dst_addr, Regist + } + + void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, Register src_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LoadType type, LiftoffRegList /* pinned */, + bool /* i64_offset */) { + if (type.value() != LoadType::kI64Load) { +@@ -667,7 +667,7 @@ void LiftoffAssembler::AtomicLoad(LiftoffRegister dst, + } + + void LiftoffAssembler::AtomicStore(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister src, ++ uintptr_t offset_imm, LiftoffRegister src, + StoreType type, LiftoffRegList pinned, + bool /* i64_offset */) { + DCHECK_NE(offset_reg, no_reg); +@@ -737,7 +737,7 @@ enum Binop { kAdd, kSub, kAnd, kOr, kXor, kExchange }; + + inline void AtomicAddOrSubOrExchange32(LiftoffAssembler* lasm, Binop binop, + Register dst_addr, Register offset_reg, +- uint32_t offset_imm, ++ uintptr_t offset_imm, + LiftoffRegister value, + LiftoffRegister result, StoreType type) { + DCHECK_EQ(value, result); +@@ -804,7 +804,7 @@ inline void AtomicAddOrSubOrExchange32(LiftoffAssemble + } + + inline void AtomicBinop32(LiftoffAssembler* lasm, Binop op, Register dst_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LiftoffRegister value, LiftoffRegister result, + StoreType type) { + DCHECK_EQ(value, result); +@@ -916,7 +916,7 @@ inline void AtomicBinop32(LiftoffAssembler* lasm, Bino + } + + inline void AtomicBinop64(LiftoffAssembler* lasm, Binop op, Register dst_addr, +- Register offset_reg, uint32_t offset_imm, ++ Register offset_reg, uintptr_t offset_imm, + LiftoffRegister value, LiftoffRegister result) { + // We need {ebx} here, which is the root register. As the root register it + // needs special treatment. As we use {ebx} directly in the code below, we +@@ -1008,7 +1008,7 @@ inline void AtomicBinop64(LiftoffAssembler* lasm, Bino + } // namespace liftoff + + void LiftoffAssembler::AtomicAdd(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1022,7 +1022,7 @@ void LiftoffAssembler::AtomicAdd(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicSub(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1035,7 +1035,7 @@ void LiftoffAssembler::AtomicSub(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicAnd(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1049,7 +1049,7 @@ void LiftoffAssembler::AtomicAnd(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicOr(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1063,7 +1063,7 @@ void LiftoffAssembler::AtomicOr(Register dst_addr, Reg + } + + void LiftoffAssembler::AtomicXor(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, LiftoffRegister value, ++ uintptr_t offset_imm, LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { + if (type.value() == StoreType::kI64Store) { +@@ -1077,7 +1077,7 @@ void LiftoffAssembler::AtomicXor(Register dst_addr, Re + } + + void LiftoffAssembler::AtomicExchange(Register dst_addr, Register offset_reg, +- uint32_t offset_imm, ++ uintptr_t offset_imm, + LiftoffRegister value, + LiftoffRegister result, StoreType type, + bool /* i64_offset */) { +@@ -1092,7 +1092,7 @@ void LiftoffAssembler::AtomicExchange(Register dst_add + } + + void LiftoffAssembler::AtomicCompareExchange( +- Register dst_addr, Register offset_reg, uint32_t offset_imm, ++ Register dst_addr, Register offset_reg, uintptr_t offset_imm, + LiftoffRegister expected, LiftoffRegister new_value, LiftoffRegister result, + StoreType type, bool /* i64_offset */) { + // We expect that the offset has already been added to {dst_addr}, and no |