diff options
Diffstat (limited to 'sysutils/cpu-microcode-intel')
| -rw-r--r-- | sysutils/cpu-microcode-intel/Makefile | 48 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/distinfo | 3 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/files/LICENSE | 125 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/files/Makefile | 18 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/files/ucode-split.c | 203 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/pkg-descr | 7 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/pkg-message | 8 | ||||
| -rw-r--r-- | sysutils/cpu-microcode-intel/pkg-plist | 212 |
8 files changed, 624 insertions, 0 deletions
diff --git a/sysutils/cpu-microcode-intel/Makefile b/sysutils/cpu-microcode-intel/Makefile new file mode 100644 index 000000000000..3bf75e45b495 --- /dev/null +++ b/sysutils/cpu-microcode-intel/Makefile @@ -0,0 +1,48 @@ +PORTNAME= microcode +DISTVERSIONPREFIX= microcode- +DISTVERSION= 20230808 +CATEGORIES= sysutils +PKGNAMEPREFIX= cpu- +PKGNAMESUFFIX= -intel + +MAINTAINER= sbruno@FreeBSD.org +COMMENT= Intel CPU microcode updates +WWW= https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files + +LICENSE= EULA +LICENSE_NAME= Intel Software License Agreement +LICENSE_FILE= ${FILESDIR}/LICENSE +LICENSE_PERMS= dist-mirror no-dist-sell pkg-mirror no-pkg-sell auto-accept + +ONLY_FOR_ARCHS= amd64 i386 + +RUN_DEPENDS= ${LOCALBASE}/etc/rc.d/microcode_update:sysutils/cpu-microcode-rc + +USES= cpe +CPE_PART= o +CPE_VENDOR= intel +CPE_PRODUCT= microcode +USE_GITHUB= yes +GH_ACCOUNT= intel +GH_PROJECT= Intel-Linux-Processor-Microcode-Data-Files + +DATADIR= ${PREFIX}/share/cpucontrol +FWDIR= /boot/firmware +NO_ARCH= yes + +NO_WRKSUBDIR= yes + +post-extract: + ${CP} -p ${FILESDIR}/Makefile ${FILESDIR}/ucode-split.c ${WRKSRC} + ${REINPLACE_CMD} 's|%%GH_TAGNAME%%|${GH_TAGNAME}|g' ${WRKSRC}/Makefile + ${CAT} ${WRKSRC}/Intel-Linux-Processor-Microcode-Data-Files-${GH_TAGNAME}/intel-ucode/* \ + ${WRKSRC}/Intel-Linux-Processor-Microcode-Data-Files-${GH_TAGNAME}/intel-ucode-with-caveats/* \ + > ${WRKSRC}/intel-ucode.bin + +do-install: + ${MKDIR} ${STAGEDIR}${DATADIR}/ + ${INSTALL_DATA} ${WRKSRC}/mcodes/* ${STAGEDIR}${DATADIR}/ + ${MKDIR} ${STAGEDIR}${FWDIR} + ${INSTALL_DATA} ${WRKSRC}/intel-ucode.bin ${STAGEDIR}${FWDIR}/ + +.include <bsd.port.mk> diff --git a/sysutils/cpu-microcode-intel/distinfo b/sysutils/cpu-microcode-intel/distinfo new file mode 100644 index 000000000000..d256c4575f71 --- /dev/null +++ b/sysutils/cpu-microcode-intel/distinfo @@ -0,0 +1,3 @@ +TIMESTAMP = 1691520692 +SHA256 (intel-Intel-Linux-Processor-Microcode-Data-Files-microcode-20230808_GH0.tar.gz) = fe49bb719441f20335ed6004090ab38cdc374134d36d4f5d30be7ed93b820313 +SIZE (intel-Intel-Linux-Processor-Microcode-Data-Files-microcode-20230808_GH0.tar.gz) = 13011561 diff --git a/sysutils/cpu-microcode-intel/files/LICENSE b/sysutils/cpu-microcode-intel/files/LICENSE new file mode 100644 index 000000000000..905826435746 --- /dev/null +++ b/sysutils/cpu-microcode-intel/files/LICENSE @@ -0,0 +1,125 @@ +The terms of the software license agreement included with any software you download will control your use of the software. + +INTEL SOFTWARE LICENSE AGREEMENT + +IMPORTANT - READ BEFORE COPYING, INSTALLING OR USING. +Do not use or load this software and any associated materials (collectively, +the "Software") until you have carefully read the following terms and +conditions. By loading or using the Software, you agree to the terms of this +Agreement. If you do not wish to so agree, do not install or use the Software. + +LICENSES: Please Note: +- If you are a network administrator, the "Site License" below shall +apply to you. +- If you are an end user, the "Single User License" shall apply to you. +- If you are an original equipment manufacturer (OEM), the "OEM License" +shall apply to you. + +SITE LICENSE. You may copy the Software onto your organization's computers +for your organization's use, and you may make a reasonable number of +back-up copies of the Software, subject to these conditions: + +1. This Software is licensed for use only in conjunction with Intel +component products. Use of the Software in conjunction with non-Intel +component products is not licensed hereunder. +2. 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You may not +export the Software in violation of applicable export laws and regulations. +Intel is not obligated under any other agreements unless they are in writing +and signed by an authorized representative of Intel. + +GOVERNMENT RESTRICTED RIGHTS. The Software is provided with "RESTRICTED +RIGHTS." Use, duplication, or disclosure by the Government is subject to +restrictions as set forth in FAR52.227-14 and DFAR252.227-7013 et seq. or its +successor. Use of the Software by the Government constitutes acknowledgment +of Intel's proprietary rights therein. Contractor or Manufacturer is Intel +2200 Mission College Blvd., Santa Clara, CA 95052. diff --git a/sysutils/cpu-microcode-intel/files/Makefile b/sysutils/cpu-microcode-intel/files/Makefile new file mode 100644 index 000000000000..975279ec2a14 --- /dev/null +++ b/sysutils/cpu-microcode-intel/files/Makefile @@ -0,0 +1,18 @@ +INTEL_UCODE= Intel-Linux-Processor-Microcode-Data-Files-%%GH_TAGNAME%%/intel-ucode +OUTPUT_DIR= mcodes + +all: ucode +ucode: ucode-split + mkdir -p $(OUTPUT_DIR) + cd ${OUTPUT_DIR} && \ + for file in \ + ../${INTEL_UCODE}/[0-9,a-f][0-9,a-f]-[0-9,a-f][0-9,a-f]-[0-9,a-f][0-9,a-f]; do \ + ../ucode-split $$file; \ + done + +# Use the host cc to compile ucode-split in case of cross-compile +ucode-split: ucode-split.c + ${CC} ucode-split.c -o $@ + +clean: + rm -rf $(OUTPUT_DIR) ucode-split diff --git a/sysutils/cpu-microcode-intel/files/ucode-split.c b/sysutils/cpu-microcode-intel/files/ucode-split.c new file mode 100644 index 000000000000..be659a613902 --- /dev/null +++ b/sysutils/cpu-microcode-intel/files/ucode-split.c @@ -0,0 +1,203 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (C) 2018 The FreeBSD Foundation. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +#include <err.h> +#include <fcntl.h> +#include <stdbool.h> +#include <stdint.h> +#include <stdio.h> +#include <stdlib.h> +#include <string.h> +#include <unistd.h> + +static const size_t bufsize = 65536; + +/* SDM vol 3 9.11.1 Intel microcode header. */ +struct microcode_update_header { + uint32_t header_version; + uint32_t update_revision; + uint32_t date; /* BCD mmddyyyy */ + uint32_t processor_signature; + uint32_t checksum; /* Over update data and header */ + uint32_t loader_revision; + uint32_t processor_flags; + uint32_t data_size; + uint32_t total_size; + uint32_t reserved[3]; +}; + +/* + * SDM vol 2A CPUID EAX = 01h Returns Model, Family, Stepping Information. + * Caller must free the returned string. + */ + +static char * +format_signature(uint32_t signature) +{ + char *buf; + unsigned family, model, stepping; + + family = (signature & 0xf00) >> 8; + model = (signature & 0xf0) >> 4; + stepping = signature & 0xf; + if (family == 0x06 || family == 0x0f) + model += (signature & 0xf0000) >> 12; + if (family == 0x0f) + family += (signature & 0xff00000) >> 20; + asprintf(&buf, "%02x-%02x-%02x", family, model, stepping); + if (buf == NULL) + err(1, "asprintf"); + return (buf); +} + +static void +dump_header(const struct microcode_update_header *hdr) +{ + char *sig_str; + int i; + bool platformid_printed; + + sig_str = format_signature(hdr->processor_signature); + printf("header version\t0x%x\n", hdr->header_version); + printf("revision\t0x%x\n", hdr->update_revision); + printf("date\t\t0x%x\t%04x-%02x-%02x\n", hdr->date, + hdr->date & 0xffff, (hdr->date & 0xff000000) >> 24, + (hdr->date & 0xff0000) >> 16); + printf("signature\t0x%x\t\t%s\n", hdr->processor_signature, sig_str); + printf("checksum\t0x%x\n", hdr->checksum); + printf("loader revision\t0x%x\n", hdr->loader_revision); + printf("processor flags\t0x%x", hdr->processor_flags); + platformid_printed = false; + for (i = 0; i < 8; i++) { + if (hdr->processor_flags & 1 << i) { + printf("%s%d", platformid_printed ? ", " : "\t\t", i); + platformid_printed = true; + } + } + printf("\n"); + printf("datasize\t0x%x\t\t0x%x\n", hdr->data_size, + hdr->data_size != 0 ? hdr->data_size : 2000); + printf("size\t\t0x%x\t\t0x%x\n", hdr->total_size, + hdr->total_size != 0 ? hdr->total_size : 2048); + free(sig_str); +} + +static void +usage(void) +{ + + printf("ucode-split [-v] microcode_file\n"); + exit(1); +} + +int +main(int argc, char *argv[]) +{ + struct microcode_update_header hdr; + char *buf, *output_file, *sig_str; + size_t len, resid; + ssize_t rv; + int c, ifd, ofd; + bool vflag; + + vflag = false; + while ((c = getopt(argc, argv, "v")) != -1) { + switch (c) { + case 'v': + vflag = true; + break; + default: + usage(); + } + } + argc -= optind; + argv += optind; + + if (argc != 1) + usage(); + + ifd = open(argv[0], O_RDONLY); + if (ifd < 0) + err(1, "open"); + + buf = malloc(bufsize); + if (buf == NULL) + err(1, "malloc"); + + for (;;) { + /* Read header. */ + rv = read(ifd, &hdr, sizeof(hdr)); + if (rv < 0) { + err(1, "read"); + } else if (rv == 0) { + break; + } else if (rv < (ssize_t)sizeof(hdr)) { + errx(1, "invalid microcode header"); + } + if (hdr.header_version != 1) + errx(1, "invalid header version"); + + if (vflag) + dump_header(&hdr); + + sig_str = format_signature(hdr.processor_signature); + asprintf(&output_file, "%s.%02x", sig_str, + hdr.processor_flags & 0xff); + free(sig_str); + if (output_file == NULL) + err(1, "asprintf"); + ofd = open(output_file, O_WRONLY | O_CREAT | O_TRUNC, 0600); + if (ofd < 0) + err(1, "open"); + + /* Write header. */ + rv = write(ofd, &hdr, sizeof(hdr)); + if (rv < (ssize_t)sizeof(hdr)) + err(1, "write"); + + /* Copy data. */ + resid = (hdr.total_size != 0 ? hdr.total_size : 2048) - + sizeof(hdr); + if (resid > 1 << 24) /* Arbitrary chosen maximum size. */ + errx(1, "header total_size too large"); + while (resid > 0) { + len = resid < bufsize ? resid : bufsize; + rv = read(ifd, buf, len); + if (rv < 0) + err(1, "read"); + else if (rv < (ssize_t)len) + errx(1, "truncated microcode data"); + if (write(ofd, buf, len) < (ssize_t)len) + err(1, "write"); + resid -= len; + } + if (vflag) + printf("written to %s\n\n", output_file); + close(ofd); + free(output_file); + } +} diff --git a/sysutils/cpu-microcode-intel/pkg-descr b/sysutils/cpu-microcode-intel/pkg-descr new file mode 100644 index 000000000000..bb3abee393e0 --- /dev/null +++ b/sysutils/cpu-microcode-intel/pkg-descr @@ -0,0 +1,7 @@ +This port uses the cpuctl(4) microcode update facility to keep your Intel +processor's firmware up-to-date. + +Updating your microcode can help to mitigate certain potential security +vulnerabilities in CPUs as well as address certain functional issues that could, +for example, result in unpredictable system behavior such as hangs, crashes, +unexpected reboots, data errors, etc. diff --git a/sysutils/cpu-microcode-intel/pkg-message b/sysutils/cpu-microcode-intel/pkg-message new file mode 100644 index 000000000000..cb644c546b28 --- /dev/null +++ b/sysutils/cpu-microcode-intel/pkg-message @@ -0,0 +1,8 @@ +[ +{ type: install + message: <<EOM +Refer to the cpu-microcode-rc installation notes to enable Intel +microcode updates. +EOM +} +] diff --git a/sysutils/cpu-microcode-intel/pkg-plist b/sysutils/cpu-microcode-intel/pkg-plist new file mode 100644 index 000000000000..3d1beca7852d --- /dev/null +++ b/sysutils/cpu-microcode-intel/pkg-plist @@ -0,0 +1,212 @@ +%%DATADIR%%/06-03-02.00 +%%DATADIR%%/06-05-00.01 +%%DATADIR%%/06-05-00.02 +%%DATADIR%%/06-05-00.08 +%%DATADIR%%/06-05-01.01 +%%DATADIR%%/06-05-02.01 +%%DATADIR%%/06-05-02.02 +%%DATADIR%%/06-05-02.04 +%%DATADIR%%/06-05-03.01 +%%DATADIR%%/06-05-03.02 +%%DATADIR%%/06-05-03.04 +%%DATADIR%%/06-05-03.08 +%%DATADIR%%/06-06-00.01 +%%DATADIR%%/06-06-05.10 +%%DATADIR%%/06-06-0a.02 +%%DATADIR%%/06-06-0a.08 +%%DATADIR%%/06-06-0a.20 +%%DATADIR%%/06-06-0d.02 +%%DATADIR%%/06-06-0d.08 +%%DATADIR%%/06-06-0d.20 +%%DATADIR%%/06-07-01.04 +%%DATADIR%%/06-07-02.04 +%%DATADIR%%/06-07-03.04 +%%DATADIR%%/06-08-01.01 +%%DATADIR%%/06-08-01.04 +%%DATADIR%%/06-08-01.08 +%%DATADIR%%/06-08-01.10 +%%DATADIR%%/06-08-01.20 +%%DATADIR%%/06-08-03.08 +%%DATADIR%%/06-08-03.20 +%%DATADIR%%/06-08-06.01 +%%DATADIR%%/06-08-06.02 +%%DATADIR%%/06-08-06.04 +%%DATADIR%%/06-08-06.10 +%%DATADIR%%/06-08-06.80 +%%DATADIR%%/06-08-0a.10 +%%DATADIR%%/06-08-0a.20 +%%DATADIR%%/06-08-0a.80 +%%DATADIR%%/06-09-05.10 +%%DATADIR%%/06-09-05.20 +%%DATADIR%%/06-09-05.80 +%%DATADIR%%/06-0a-00.04 +%%DATADIR%%/06-0a-01.04 +%%DATADIR%%/06-0b-01.10 +%%DATADIR%%/06-0b-01.20 +%%DATADIR%%/06-0b-04.10 +%%DATADIR%%/06-0b-04.20 +%%DATADIR%%/06-0d-06.20 +%%DATADIR%%/06-0e-08.20 +%%DATADIR%%/06-0e-0c.20 +%%DATADIR%%/06-0e-0c.80 +%%DATADIR%%/06-0f-02.01 +%%DATADIR%%/06-0f-02.20 +%%DATADIR%%/06-0f-06.01 +%%DATADIR%%/06-0f-06.04 +%%DATADIR%%/06-0f-06.20 +%%DATADIR%%/06-0f-07.10 +%%DATADIR%%/06-0f-07.40 +%%DATADIR%%/06-0f-0a.80 +%%DATADIR%%/06-0f-0b.01 +%%DATADIR%%/06-0f-0b.04 +%%DATADIR%%/06-0f-0b.08 +%%DATADIR%%/06-0f-0b.10 +%%DATADIR%%/06-0f-0b.20 +%%DATADIR%%/06-0f-0b.40 +%%DATADIR%%/06-0f-0b.80 +%%DATADIR%%/06-0f-0d.01 +%%DATADIR%%/06-0f-0d.20 +%%DATADIR%%/06-0f-0d.80 +%%DATADIR%%/06-16-01.01 +%%DATADIR%%/06-16-01.02 +%%DATADIR%%/06-16-01.80 +%%DATADIR%%/06-17-06.01 +%%DATADIR%%/06-17-06.04 +%%DATADIR%%/06-17-06.10 +%%DATADIR%%/06-17-06.40 +%%DATADIR%%/06-17-06.80 +%%DATADIR%%/06-17-07.10 +%%DATADIR%%/06-17-0a.11 +%%DATADIR%%/06-17-0a.44 +%%DATADIR%%/06-17-0a.a0 +%%DATADIR%%/06-1a-04.03 +%%DATADIR%%/06-1a-05.03 +%%DATADIR%%/06-1c-02.01 +%%DATADIR%%/06-1c-02.04 +%%DATADIR%%/06-1c-02.08 +%%DATADIR%%/06-1c-0a.01 +%%DATADIR%%/06-1c-0a.04 +%%DATADIR%%/06-1c-0a.08 +%%DATADIR%%/06-1c-0a.10 +%%DATADIR%%/06-1d-01.08 +%%DATADIR%%/06-1e-05.13 +%%DATADIR%%/06-25-02.12 +%%DATADIR%%/06-25-05.92 +%%DATADIR%%/06-26-01.01 +%%DATADIR%%/06-26-01.02 +%%DATADIR%%/06-2a-07.12 +%%DATADIR%%/06-2c-02.03 +%%DATADIR%%/06-2d-06.6d +%%DATADIR%%/06-2d-07.6d +%%DATADIR%%/06-2e-06.04 +%%DATADIR%%/06-2f-02.05 +%%DATADIR%%/06-37-08.02 +%%DATADIR%%/06-37-08.0c +%%DATADIR%%/06-37-09.0f +%%DATADIR%%/06-3a-09.12 +%%DATADIR%%/06-3c-03.32 +%%DATADIR%%/06-3d-04.c0 +%%DATADIR%%/06-3e-04.ed +%%DATADIR%%/06-3e-06.ed +%%DATADIR%%/06-3e-07.ed +%%DATADIR%%/06-3f-02.6f +%%DATADIR%%/06-3f-04.80 +%%DATADIR%%/06-45-01.72 +%%DATADIR%%/06-46-01.32 +%%DATADIR%%/06-47-01.22 +%%DATADIR%%/06-4c-03.01 +%%DATADIR%%/06-4c-04.01 +%%DATADIR%%/06-4d-08.01 +%%DATADIR%%/06-4e-03.c0 +%%DATADIR%%/06-55-03.97 +%%DATADIR%%/06-55-04.b7 +%%DATADIR%%/06-55-05.b7 +%%DATADIR%%/06-55-06.bf +%%DATADIR%%/06-55-07.bf +%%DATADIR%%/06-55-0b.bf +%%DATADIR%%/06-56-02.10 +%%DATADIR%%/06-56-03.10 +%%DATADIR%%/06-56-04.10 +%%DATADIR%%/06-56-05.10 +%%DATADIR%%/06-5c-02.01 +%%DATADIR%%/06-5c-09.03 +%%DATADIR%%/06-5c-0a.03 +%%DATADIR%%/06-5e-03.36 +%%DATADIR%%/06-5f-01.01 +%%DATADIR%%/06-66-03.80 +%%DATADIR%%/06-6a-05.87 +%%DATADIR%%/06-6a-06.87 +%%DATADIR%%/06-6c-01.10 +%%DATADIR%%/06-7a-01.01 +%%DATADIR%%/06-7a-08.01 +%%DATADIR%%/06-7e-05.80 +%%DATADIR%%/06-8a-01.10 +%%DATADIR%%/06-8c-01.80 +%%DATADIR%%/06-8c-02.c2 +%%DATADIR%%/06-8d-01.c2 +%%DATADIR%%/06-8e-09.10 +%%DATADIR%%/06-8e-09.c0 +%%DATADIR%%/06-8e-0a.c0 +%%DATADIR%%/06-8e-0b.d0 +%%DATADIR%%/06-8e-0c.94 +%%DATADIR%%/06-8f-08.10 +%%DATADIR%%/06-8f-08.87 +%%DATADIR%%/06-96-01.01 +%%DATADIR%%/06-97-02.07 +%%DATADIR%%/06-9a-03.80 +%%DATADIR%%/06-9a-04.40 +%%DATADIR%%/06-9c-00.01 +%%DATADIR%%/06-9e-09.2a +%%DATADIR%%/06-9e-0a.22 +%%DATADIR%%/06-9e-0b.02 +%%DATADIR%%/06-9e-0c.22 +%%DATADIR%%/06-9e-0d.22 +%%DATADIR%%/06-a5-02.20 +%%DATADIR%%/06-a5-03.22 +%%DATADIR%%/06-a5-05.22 +%%DATADIR%%/06-a6-00.80 +%%DATADIR%%/06-a6-01.80 +%%DATADIR%%/06-a7-01.02 +%%DATADIR%%/06-b7-01.32 +%%DATADIR%%/06-ba-02.e0 +%%DATADIR%%/06-be-00.11 +%%DATADIR%%/0f-00-07.01 +%%DATADIR%%/0f-00-07.02 +%%DATADIR%%/0f-00-0a.01 +%%DATADIR%%/0f-00-0a.02 +%%DATADIR%%/0f-00-0a.04 +%%DATADIR%%/0f-01-02.04 +%%DATADIR%%/0f-02-04.02 +%%DATADIR%%/0f-02-04.04 +%%DATADIR%%/0f-02-04.10 +%%DATADIR%%/0f-02-05.01 +%%DATADIR%%/0f-02-05.02 +%%DATADIR%%/0f-02-05.04 +%%DATADIR%%/0f-02-05.10 +%%DATADIR%%/0f-02-06.02 +%%DATADIR%%/0f-02-07.02 +%%DATADIR%%/0f-02-07.04 +%%DATADIR%%/0f-02-07.08 +%%DATADIR%%/0f-02-09.02 +%%DATADIR%%/0f-02-09.04 +%%DATADIR%%/0f-02-09.08 +%%DATADIR%%/0f-03-02.0d +%%DATADIR%%/0f-03-03.0d +%%DATADIR%%/0f-03-04.1d +%%DATADIR%%/0f-04-01.02 +%%DATADIR%%/0f-04-01.bd +%%DATADIR%%/0f-04-03.9d +%%DATADIR%%/0f-04-04.9d +%%DATADIR%%/0f-04-07.9d +%%DATADIR%%/0f-04-08.01 +%%DATADIR%%/0f-04-08.02 +%%DATADIR%%/0f-04-08.5f +%%DATADIR%%/0f-04-09.bd +%%DATADIR%%/0f-04-0a.5c +%%DATADIR%%/0f-04-0a.5d +%%DATADIR%%/0f-06-02.04 +%%DATADIR%%/0f-06-04.01 +%%DATADIR%%/0f-06-04.34 +%%DATADIR%%/0f-06-05.01 +%%DATADIR%%/0f-06-08.22 +/boot/firmware/intel-ucode.bin |