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Diffstat (limited to '')
| -rw-r--r-- | cad/verilog-mode.el/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/cad/verilog-mode.el/Makefile b/cad/verilog-mode.el/Makefile index ec591ce34f7e..0dc73bbd7724 100644 --- a/cad/verilog-mode.el/Makefile +++ b/cad/verilog-mode.el/Makefile @@ -9,6 +9,7 @@ EXTRACT_SUFX= .gz MAINTAINER= ports@FreeBSD.org COMMENT= Emacs lisp modules for the Verilog language +WWW= https://www.veripool.org/wiki/verilog-mode LICENSE= GPLv3+ |