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authorPawel Pekala <pawel@FreeBSD.org>2012-12-07 21:39:55 +0000
committerPawel Pekala <pawel@FreeBSD.org>2012-12-07 21:39:55 +0000
commit4ac28dd88f48bf4b60b62bef8513c737b9c8e53e (patch)
treef4e3d86bde2d39bc35154ae721a545c464151d8c /cad
parentTaje back maintainership (diff)
- Fix build with clang
- Convert to OptionsNG, add READLINE option - Realign pkg-descr PR: ports/172724 Submitted by: KATO Tsuguru <tkato432@yahoo.com> Feature safe: yes
Notes
Notes: svn path=/head/; revision=308451
Diffstat (limited to 'cad')
-rw-r--r--cad/gnucap/Makefile32
-rw-r--r--cad/gnucap/files/patch-modelgen__mg_.h44
-rw-r--r--cad/gnucap/pkg-descr30
3 files changed, 80 insertions, 26 deletions
diff --git a/cad/gnucap/Makefile b/cad/gnucap/Makefile
index 13d5274d019e..f35efcebf546 100644
--- a/cad/gnucap/Makefile
+++ b/cad/gnucap/Makefile
@@ -1,10 +1,5 @@
-# ex:ts=8
-# Ports collection makefile for: gnucap
-# Date created: Feb 7, 2002
-# Whom: ijliao
-#
+# Created by: ijliao
# $FreeBSD$
-#
PORTNAME= gnucap
PORTVERSION= 2009.12.07
@@ -17,9 +12,11 @@ MAINTAINER= ports@FreeBSD.org
COMMENT= The GNU Circuit Analysis Package
LICENSE= GPLv3
-LICENSE_FILE= ${WRKSRC}/COPYING
-USE_GCC= any
+OPTIONS_DEFINE= READLINE DOCS EXAMPLES
+OPTIONS_DEFAULT=READLINE
+READLINE_DESC= Enable readline support
+
USE_GMAKE= yes
GNU_CONFIGURE= yes
MAKE_JOBS_SAFE= yes
@@ -29,20 +26,33 @@ PORTDOCS= *
PORTEXAMPLES= *
PLIST_FILES= bin/gnucap bin/gnucap-modelgen
+.include <bsd.port.options.mk>
+
+.if ${PORT_OPTIONS:MREADLINE}
+USE_READLINE= yes
+.else
+CONFIGURE_ARGS+=--with-readline=no
+.endif
+
post-patch:
- ${REINPLACE_CMD} -e \
+ @${REINPLACE_CMD} -e \
'/^SUBDIRS/s|doc examples||' ${WRKSRC}/Makefile.in
+.for i in src/ap_match.cc modelgen/ap_match.cc
+ @${REINPLACE_CMD} -e \
+ "s:strchr(str2, '|'):const_cast<char*>(strchr(str2, '|')):" \
+ ${WRKSRC}/${i}
+.endfor
post-install:
${INSTALL_MAN} ${WRKSRC}/doc/*.1 ${MANPREFIX}/man/man1
-.if !defined(NOPORTDOCS)
+.if ${PORT_OPTIONS:MDOCS}
@${MKDIR} ${DOCSDIR}
${INSTALL_DATA} ${WRKSRC}/doc/acs-tutorial ${DOCSDIR}
${INSTALL_DATA} ${WRKSRC}/doc/history ${DOCSDIR}
${INSTALL_DATA} ${WRKSRC}/doc/relnotes.* ${DOCSDIR}
${INSTALL_DATA} ${WRKSRC}/doc/whatisit ${DOCSDIR}
.endif
-.if !defined(NOPORTEXAMPLES)
+.if ${PORT_OPTIONS:MEXAMPLES}
@${MKDIR} ${EXAMPLESDIR}
${INSTALL_DATA} ${WRKSRC}/examples/README ${EXAMPLESDIR}
${INSTALL_DATA} ${WRKSRC}/examples/runall ${EXAMPLESDIR}
diff --git a/cad/gnucap/files/patch-modelgen__mg_.h b/cad/gnucap/files/patch-modelgen__mg_.h
new file mode 100644
index 000000000000..a104d4865040
--- /dev/null
+++ b/cad/gnucap/files/patch-modelgen__mg_.h
@@ -0,0 +1,44 @@
+--- modelgen/mg_.h.orig 2009-12-08 08:19:15.000000000 +0900
++++ modelgen/mg_.h 2012-10-14 00:54:09.000000000 +0900
+@@ -108,6 +108,20 @@
+ size_t size()const {return _list.size();}
+ };
+ /*--------------------------------------------------------------------------*/
++class C_Comment
++ :public Base
++{
++public:
++ void parse(CS& f);
++};
++/*--------------------------------------------------------------------------*/
++class Cxx_Comment
++ :public Base
++{
++public:
++ void parse(CS& f);
++};
++/*--------------------------------------------------------------------------*/
+ /* A "Collection" differs from a "List" in how it is parsed.
+ * Each parse of a "Collection" created one more object and stores
+ * it in the Collection. The size of the Collection therefore grows by 1.
+@@ -200,20 +214,6 @@
+ }
+ };
+ /*--------------------------------------------------------------------------*/
+-class C_Comment
+- :public Base
+-{
+-public:
+- void parse(CS& f);
+-};
+-/*--------------------------------------------------------------------------*/
+-class Cxx_Comment
+- :public Base
+-{
+-public:
+- void parse(CS& f);
+-};
+-/*--------------------------------------------------------------------------*/
+ class Key
+ :public Base
+ {
diff --git a/cad/gnucap/pkg-descr b/cad/gnucap/pkg-descr
index fae85f6f907d..223b3fa10608 100644
--- a/cad/gnucap/pkg-descr
+++ b/cad/gnucap/pkg-descr
@@ -1,22 +1,22 @@
GnuCap is the GNU Circuit Analysis Package.
-The primary component is a general purpose circuit simulator. It performs
-nonlinear dc and transient analyses, fourier analysis, and ac analysis. It is
-fully interactive and command driven. It can also be run in batch mode or as a
-server. Spice compatible models for the MOSFET (level 1-7) and diode are
-included in this release.
+The primary component is a general purpose circuit simulator. It
+performs nonlinear dc and transient analyses, fourier analysis, and ac
+analysis. It is fully interactive and command driven. It can also be
+run in batch mode or as a server. Spice compatible models for the
+MOSFET (level 1-7) and diode are included in this release.
-GnuCap is not based on Spice, but some of the models have been derived from
-the Berkeley models.
+GnuCap is not based on Spice, but some of the models have been derived
+from the Berkeley models.
-Unlike Spice, the engine is designed to do true mixed-mode simulation. Most
-of the code is in place for future support of event driven analog simulation,
-and true multi-rate simulation.
+Unlike Spice, the engine is designed to do true mixed-mode simulation.
+Most of the code is in place for future support of event driven analog
+simulation, and true multi-rate simulation.
-If you are tired of Spice and want a second opinion, you want to play with the
-circuit and want a simulator that is interactive, you want to study the source
-code and want something easier to follow than Spice, or you are a researcher
-working on modeling and want automated model generation tools to make your job
-easier, try GnuCap.
+If you are tired of Spice and want a second opinion, you want to play
+with the circuit and want a simulator that is interactive, you want to
+study the source code and want something easier to follow than Spice,
+or you are a researcher working on modeling and want automated model
+generation tools to make your job easier, try GnuCap.
WWW: http://www.gnucap.org/