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path: root/graphics/mesa-devel/files/patch-libdrm-2.4.109
blob: 6d15483322a95bfecd97b58342d35ad731bd20e5 (plain) (blame)
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Disable https://gitlab.freedesktop.org/mesa/mesa/-/commit/5cf4f0cc9197
until graphics/libdrm is updated to 2.4.110 or later.

meson.build:1597:4: ERROR: Invalid version of dependency, need 'libdrm_amdgpu' ['>=2.4.110'] found '2.4.109'.

../src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c:1603:11: error: implicit declaration of function 'amdgpu_cs_ctx_stable_pstate' is invalid in C99 [-Werror,-Wimplicit-function-declaration]
   return amdgpu_cs_ctx_stable_pstate(ctx->ctx, AMDGPU_CTX_OP_SET_STABLE_PSTATE, amdgpu_pstate, NULL);
          ^

--- meson.build.orig	2022-02-23 18:31:55 UTC
+++ meson.build
@@ -1567,7 +1567,7 @@ dep_libdrm_radeon = null_dep
 dep_libdrm_nouveau = null_dep
 dep_libdrm_intel = null_dep
 
-_drm_amdgpu_ver = '2.4.110'
+_drm_amdgpu_ver = '2.4.109'
 _drm_radeon_ver = '2.4.71'
 _drm_nouveau_ver = '2.4.102'
 _drm_intel_ver = '2.4.75'
--- src/amd/vulkan/radv_radeon_winsys.h.orig	2022-02-23 18:31:55 UTC
+++ src/amd/vulkan/radv_radeon_winsys.h
@@ -258,7 +258,9 @@ struct radeon_winsys {
 
    bool (*ctx_wait_idle)(struct radeon_winsys_ctx *ctx, enum ring_type ring_type, int ring_index);
 
+#if 0
    int (*ctx_set_pstate)(struct radeon_winsys_ctx *ctx, uint32_t pstate);
+#endif
 
    enum radeon_bo_domain (*cs_domain)(const struct radeon_winsys *ws);
 
--- src/amd/vulkan/radv_sqtt.c.orig	2022-02-23 18:31:55 UTC
+++ src/amd/vulkan/radv_sqtt.c
@@ -429,6 +429,7 @@ radv_thread_trace_finish_bo(struct radv_device *device
    }
 }
 
+#if 0
 static int
 radv_thread_trace_init_pstate(struct radv_device *device)
 {
@@ -448,6 +449,7 @@ radv_thread_trace_init_pstate(struct radv_device *devi
 
    return true;
 }
+#endif
 
 bool
 radv_thread_trace_init(struct radv_device *device)
@@ -466,8 +468,10 @@ radv_thread_trace_init(struct radv_device *device)
    if (!radv_thread_trace_init_bo(device))
       return false;
 
+#if 0
    if (!radv_thread_trace_init_pstate(device))
       return false;
+#endif
 
    list_inithead(&thread_trace_data->rgp_pso_correlation.record);
    simple_mtx_init(&thread_trace_data->rgp_pso_correlation.lock, mtx_plain);
--- src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c.orig	2022-02-23 18:31:55 UTC
+++ src/amd/vulkan/winsys/amdgpu/radv_amdgpu_cs.c
@@ -1576,6 +1576,7 @@ radv_amdgpu_ctx_wait_idle(struct radeon_winsys_ctx *rw
    return true;
 }
 
+#if 0
 static uint32_t
 radv_to_amdgpu_pstate(enum radeon_ctx_pstate radv_pstate)
 {
@@ -1602,6 +1603,7 @@ radv_amdgpu_ctx_set_pstate(struct radeon_winsys_ctx *r
    uint32_t amdgpu_pstate = radv_to_amdgpu_pstate(pstate);
    return amdgpu_cs_ctx_stable_pstate(ctx->ctx, AMDGPU_CTX_OP_SET_STABLE_PSTATE, amdgpu_pstate, NULL);
 }
+#endif
 
 static void *
 radv_amdgpu_cs_alloc_syncobj_chunk(struct radv_winsys_sem_counts *counts, uint32_t queue_syncobj,
@@ -1830,7 +1832,9 @@ radv_amdgpu_cs_init_functions(struct radv_amdgpu_winsy
    ws->base.ctx_create = radv_amdgpu_ctx_create;
    ws->base.ctx_destroy = radv_amdgpu_ctx_destroy;
    ws->base.ctx_wait_idle = radv_amdgpu_ctx_wait_idle;
+#if 0
    ws->base.ctx_set_pstate = radv_amdgpu_ctx_set_pstate;
+#endif
    ws->base.cs_domain = radv_amdgpu_cs_domain;
    ws->base.cs_create = radv_amdgpu_cs_create;
    ws->base.cs_destroy = radv_amdgpu_cs_destroy;